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[^_N؋ARGv벋 ‰) v=$rҁ@[^_`vp= :puxǃ tJ@t6t  v%0f0Nǃ?.yҁA$/&D$$5t$D$$P$}$D$$$1MNj@|$ t$D$$D$t$$PҁAD$t$$T$ 0$ҁA l        &, 5I *38DT^lx7$)Hix}RfvG{Kv& A d          s  $ 2 ;  @ E N  j o  t     - G L h u      AN ( - ; j*?H_dCT 05HMgl&1;A0=MReju~1:INbkw|8CYbuz5 \ w  % O Xkp',CHTY^%"'K8=NSkpx  !! !%!1!6!B!G!t!}!!!!!!!!"""&#@#E#V#[#######$$$:$?$R$[$%%&&8&A&'''(((((())))'),)8)=)o)t)))))))/<VS1ۋ u[^#(-8EJQUWVS@ttD$$ dЀu$8 ,OL G(p$G"G,GGG!G @LJ=u =t Dž DžDž@$ =uDžOLǀD$[nandsim] debug: read_word <3>[nandsim] error: get_state_name: unknown state, BUG <7>[nandsim] debug: switch_to_ready_state: switch to %s state <3>[nandsim] error: get_state_by_command: unknown command, BUG <7>[nandsim] debug: device_ready <3>[nandsim] error: wrong bus width (%d), use only 8 or 16 <3>[nandsim] error: unable to allocate core structures. <3>[nandsim] error: invalid weakblocks. <3>[nandsim] error: unable to allocate memory. <3>[nandsim] error: invalid weakpagess. <3>[nandsim] error: invalid gravepagess. <3>[nandsim] error: can't register NAND Simulator <3>[nandsim] error: overridesize is too big <3>[nandsim] error: Too many erase blocks for wear reporting <3>[nandsim] error: init_nandsim: nandsim is already initialized <3>[nandsim] error: init_nandsim: unknown page size %u <3>[nandsim] error: too many partitions. <3>[nandsim] error: bad partition size. <4>[nandsim] warning: 16-bit flashes support wasn't tested flash size with OOB: %llu KiB <3>[nandsim] error: alloc_device: cache file not readable <3>[nandsim] error: alloc_device: cache file not writeable <3>[nandsim] error: alloc_device: unable to allocate pages written array <3>[nandsim] error: alloc_device: unable to allocate file buf <3>[nandsim] error: alloc_device: unable to allocate page array <3>[nandsim] error: cache_create: unable to create kmem_cache <3>[nandsim] error: init_nandsim: unable to allocate %u bytes for the internal buffer <3>[nandsim] error: invalid badblocks. <3>[nandsim] error: write_buf: data input isn't expected, state is %s, switch to STATE_READY <3>[nandsim] error: write_buf: too many input bytes <7>[nandsim] debug: write_buf: %d bytes were written <4>[nandsim] warning: read_page: flipping bit %d in page %d reading from %d ecc: corrected=%u failed=%u <4>[nandsim] warning: simulating read error in page %u <4>[nandsim] warning: do_state_action: wrong page number (%#x) <3>[nandsim] error: do_state_action: column number is too large <7>[nandsim] debug: read_page: page %d not written <7>[nandsim] debug: read_page: page %d written, reading from %d <3>[nandsim] error: read_page: read error for page %d ret %ld <7>[nandsim] debug: read_page: page %d not allocated <7>[nandsim] debug: read_page: page %d allocated, reading from %d <7>[nandsim] debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d <7>[nandsim] log: read page %d <7>[nandsim] log: read page %d (second half) <7>[nandsim] log: read OOB of page %d <3>[nandsim] error: do_state_action: device is write-protected, ignore sector erase <3>[nandsim] error: do_state_action: wrong sector address (%#x) <7>[nandsim] debug: do_state_action: erase sector at address %#x, off = %d <7>[nandsim] log: erase sector %u <7>[nandsim] debug: erase_sector: freeing page %d <3>[nandsim] error: Erase counter total overflow <3>[nandsim] error: Erase counter overflow for erase block %u <6>[nandsim] *** Wear Report *** <6>[nandsim] Total numbers of erases: %lu <6>[nandsim] Number of erase blocks: %u <6>[nandsim] Average number of erases: %lu <6>[nandsim] Maximum number of erases: %lu <6>[nandsim] Minimum number of erases: %lu <6>[nandsim] Number of ebs with erase counts from %lu to %lu : %lu <6>[nandsim] *** End of Wear Report *** <4>[nandsim] warning: simulating erase failure in erase block %u <4>[nandsim] warning: do_state_action: device is write-protected, programm <3>[nandsim] error: do_state_action: too few bytes were input (%d instead of %d) <7>[nandsim] debug: prog_page: writing page %d <3>[nandsim] error: prog_page: read error for page %d ret %ld <3>[nandsim] error: prog_page: write error for page %d ret %ld <7>[nandsim] debug: prog_page: allocating page %d <3>[nandsim] error: prog_page: error allocating memory for page %d <7>[nandsim] debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d <7>[nandsim] log: programm page %d <4>[nandsim] warning: simulating write failure in page %u <7>[nandsim] debug: do_state_action: set internal offset to 0 <3>[nandsim] error: do_state_action: BUG! can't skip half of page for non-512byte page size 8x chips <7>[nandsim] debug: do_state_action: set internal offset to %d <7>[nandsim] debug: do_state_action: BUG! unknown action <7>[nandsim] debug: find_operation: operation found, index: %d, state: %s, nxstate %s <7>[nandsim] debug: find_operation: no operation found, try again with state %s <7>[nandsim] debug: find_operation: no operations found <7>[nandsim] debug: find_operation: BUG, operation must be known if address is input <7>[nandsim] debug: find_operation: there is still ambiguity <7>[nandsim] debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s <7>[nandsim] debug: switch_state: operation is unknown, try to find it <7>[nandsim] debug: switch_state: double the column number for 16x device <4>[nandsim] warning: switch_state: not all bytes were processed, %d left <7>[nandsim] debug: switch_state: operation complete, switch to STATE_READY state <7>[nandsim] debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s <3>[nandsim] error: switch_state: BUG! unknown data state <3>[nandsim] error: switch_state: BUG! unknown address state <3>[nandsim] error: read_buf: chip is disabled <3>[nandsim] error: read_buf: ALE or CLE pin is high <4>[nandsim] warning: read_buf: unexpected data output cycle, current state is %s <3>[nandsim] error: read_buf: too many bytes to read <7>[nandsim] debug: read_buf: switch to the next page (%#x) <7>[nandsim] debug: verify_buf: the buffer is OK <7>[nandsim] debug: verify_buf: the buffer is wrong <3>[nandsim] error: read_byte: chip is disabled, return %#x <3>[nandsim] error: read_byte: ALE or CLE pin is high, return %#x <4>[nandsim] warning: read_byte: unexpected data output cycle, state is %s return %#x <7>[nandsim] debug: read_byte: return %#x status <4>[nandsim] warning: read_byte: no more data to output, return %#x <7>[nandsim] debug: read_byte: read ID byte %d, total = %d <7>[nandsim] debug: read_byte: all bytes were read <7>[nandsim] debug: read_byte: switch to the next page (%#x) <3>[nandsim] error: write_byte: chip is disabled, ignore write <3>[nandsim] error: write_byte: ALE and CLE pins are high simultaneously, ignore write <4>[nandsim] warning: write_byte: command (%#x) wasn't expected, expected state is %s, ignore previous states <7>[nandsim] debug: command byte corresponding to %s state accepted <7>[nandsim] debug: write_byte: operation isn't known yet, identify it <3>[nandsim] error: write_byte: address (%#x) isn't expected, expected state is %s, switch to STATE_READY <3>[nandsim] error: write_byte: no more address bytes expected <7>[nandsim] debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected) <7>[nandsim] debug: address (%#x, %#x) is accepted <3>[nandsim] error: write_byte: data input (%#x) isn't expected, state is %s, switch to %s <4>[nandsim] warning: write_byte: %u input bytes has already been accepted, ignore write <3>[nandsim] error: write_byte: unknown command %#x STATE_CMD_READ1STATE_CMD_READ0STATE_CMD_PAGEPROGSTATE_CMD_READOOBSTATE_CMD_READSTARTSTATE_CMD_ERASE1STATE_CMD_STATUSSTATE_CMD_STATUS_MSTATE_CMD_SEQINSTATE_CMD_READIDSTATE_CMD_ERASE2STATE_CMD_RESETSTATE_CMD_RNDOUTSTATE_CMD_RNDOUTSTARTSTATE_ADDR_PAGESTATE_ADDR_SECSTATE_ADDR_ZEROSTATE_ADDR_COLUMNSTATE_DATAINSTATE_DATAOUTSTATE_DATAOUT_IDSTATE_DATAOUT_STATUSSTATE_DATAOUT_STATUS_MSTATE_READYSTATE_UNKNOWNNAND simulator partition %dflash size: %llu MiB page size: %u bytes OOB area size: %u bytes sector size: %u KiB pages number: %u pages per sector: %u bus width: %u bits in sector size: %u bits in page size: %u bits in OOB size: %u page address bytes: %u sector address bytes: %u options: %#x nandsimdrivers/mtd/nand/nandsim.c<7>[nandsim] log: reset chip "+( description=The NAND flash simulatorauthor=Artem B. Bityuckiylicense=GPLparm=cache_file:File to use to cache nand pages instead of memoryparm=overridesize:Specifies the NAND Flash size overriding the ID bytes. The size is specified in erase blocks and as the exponent of a power of two e.g. 5 means a size of 32 erase blocksparm=rptwear:Number of erases inbetween reporting wear, if not zeroparm=gravepages:Pages that lose data [: maximum reads (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be read only twice before failingparm=bitflips:Maximum number of random bit flips per page (zero by default)parm=weakpages:Weak pages [: maximum writes (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be written only twice before failingparm=weakblocks:Weak erase blocks [: remaining erase cycles (defaults to 3)] separated by commas e.g. 113:2 means eb 113 can be erased only twice before failingparm=badblocks:Erase blocks that are initially marked bad, separated by commasparm=parts:Partition sizes (in erase blocks) separated by commasparm=dbg:Output debug information if not zeroparm=log:Perform logging if not zeroparm=do_delays:Simulate NAND delays using busy-waits if not zeroparm=bus_width:Chip's bus width (8- or 16-bit)parm=input_cycle:Word input (to flash) time (nanodeconds)parm=output_cycle:Word output (from flash) time (nanodeconds)parm=erase_delay:Sector erase delay (milliseconds)parm=programm_delay:Page programm delay (microsecondsparm=access_delay:Initial page access delay (microseconds)parm=fourth_id_byte:The fourth byte returned by NAND Flash 'read ID' commandparm=third_id_byte:The third byte returned by NAND Flash 'read ID' commandparm=second_id_byte:The second byte returned by NAND Flash 'read ID' command (chip ID)parm=first_id_byte:The first byte returned by NAND Flash 'read ID' command (manufacturer ID)parmtype=cache_file:charpparmtype=overridesize:uintparmtype=rptwear:uintparmtype=gravepages:charpparmtype=bitflips:uintparmtype=weakpages:charpparmtype=weakblocks:charpparmtype=badblocks:charpparmtype=parts:array of ulongparmtype=dbg:uintparmtype=log:uintparmtype=do_delays:uintparmtype=bus_width:uintparmtype=input_cycle:uintparmtype=output_cycle:uintparmtype=erase_delay:uintparmtype=programm_delay:uintparmtype=access_delay:uintparmtype=fourth_id_byte:uintparmtype=third_id_byte:uintparmtype=second_id_byte:uintparmtype=first_id_byte:uintsrcversion=0D0006EFEC083D5DA056F88depends=nand,nand_idsvermagic=2.6.32-642.el6.i686 SMP mod_unload modversions 686    +4>IS\t x$|(  $  $(048<DHLPX\`dlptx    $( ,48< @HLP T\`d hptx |   nAmodule_layout lvparam_get_ulong řparam_set_ulongfCparam_array_get'wEparam_array_setparam_get_uintH̅2param_set_uint@4Aparam_get_charpejparam_set_charpkmem_cache_alloc__const_udelayk}__udelay[+memsetJnrandom32 6_vfs_writexU?vfs_read }per_cpu__current_taskuxP-put_pagepwrite_inode_now[unlock_page >find_or_create_page find_get_pageκ`.memcpyD+\add_mtd_partitions${{nand_default_bbtkmem_cache_createhvmalloc>filp_openrknand_flash_ids[__kmallocLnand_scanC__list_add) simple_strtoulEkmem_cache_alloc_tracemalloc_sizes__stack_chk_failkstrdupZ, 3 68 ;N`MfK} W]  6 K([o( < B P+ Y d4 ,r DxW> n I  S\ t 0<xL cu|     1 )> WL p, f @  T 2 N he   |     4 J d r | # C   ` =    L    U , 3 9 I [ r  a            - > E N U ^ n y              ' = nandsim.cfree_devicefree_listsweak_blocksweak_pagesgrave_pageserase_block_wearns_cleanup_modulensmtdns_nand_read_worddbgget_state_nameswitch_to_ready_stateget_state_by_commandns_device_readyget_partition_namens_init_modulebus_widthns_hwcontrolns_nand_read_bytens_nand_write_bufns_nand_read_bufns_nand_verify_bufthird_id_bytefourth_id_bytefirst_id_bytesecond_id_byteweakblocksweakpagesgravepagesoverridesizerptwearwear_eb_countparts_numpartscache_filebadblocksget_pagesread_filewrite_filebitflipsdo_state_actionlogdo_delaysprogramm_delayoutput_cycleaccess_delayinput_cycleerase_delaytotal_wearrptwear_cntfind_operationopsswitch_statens_verify_buf__mod_description2364__mod_author2363__mod_license2362__mod_cache_file161__mod_overridesize160__mod_rptwear157__mod_gravepages156__mod_bitflips153__mod_weakpages152__mod_weakblocks149__mod_badblocks146__mod_parts144__mod_dbg143__mod_log142__mod_do_delays141__mod_bus_width140__mod_input_cycle139__mod_output_cycle138__mod_erase_delay137__mod_programm_delay136__mod_access_delay135__mod_fourth_id_byte134__mod_third_id_byte133__mod_second_id_byte132__mod_first_id_byte131__mod_cache_filetype129__param_cache_file__param_str_cache_file__mod_overridesizetype128__param_overridesize__param_str_overridesize__mod_rptweartype127__param_rptwear__param_str_rptwear__mod_gravepagestype126__param_gravepages__param_str_gravepages__mod_bitflipstype125__param_bitflips__param_str_bitflips__mod_weakpagestype124__param_weakpages__param_str_weakpages__mod_weakblockstype123__param_weakblocks__param_str_weakblocks__mod_badblockstype122__param_badblocks__param_str_badblocks__mod_partstype121__param_parts__param_str_parts__param_arr_parts__mod_dbgtype120__param_dbg__param_str_dbg__mod_logtype119__param_log__param_str_log__mod_do_delaystype118__param_do_delays__param_str_do_delays__mod_bus_widthtype117__param_bus_width__param_str_bus_width__mod_input_cycletype116__param_input_cycle__param_str_input_cycle__mod_output_cycletype115__param_output_cycle__param_str_output_cycle__mod_erase_delaytype114__param_erase_delay__param_str_erase_delay__mod_programm_delaytype113__param_programm_delay__param_str_programm_delay__mod_access_delaytype112__param_access_delay__param_str_access_delay__mod_fourth_id_bytetype111__param_fourth_id_byte__param_str_fourth_id_byte__mod_third_id_bytetype110__param_third_id_byte__param_str_third_id_byte__mod_second_id_bytetype109__param_second_id_byte__param_str_second_id_byte__mod_first_id_bytetype108__param_first_id_byte__param_str_first_id_bytenandsim.mod.c_rheldata__mod_srcversion74__module_depends____versions__mod_vermagic5filp_openvfs_write__udelay__this_modulefind_get_pagenand_flash_idsput_pagecleanup_moduleparam_set_uintmemcpykfreeparam_set_charpkmem_cache_createkmem_cache_alloc_traceparam_get_ulonginit_modulenand_scanparam_get_uint__stack_chk_failkmem_cache_allocdo_bit_flipsunlock_pagelist_delkmem_cache_freedo_read_errorfind_or_create_pagewrite_inode_nownand_default_bbtprintkrandom32memsetvfs_readparam_get_charp__list_addkstrdupparam_array_setsprintfvfreenand_releaseadd_mtd_partitions__const_udelayfilp_closeparam_array_getsimple_strtoulparam_set_ulongmalloc_sizesvmalloc__kmallocper_cpu__current_taskkmem_cache_destroynandsim.ko.debugM.rodata.str1.1.rodata.str1.4.rel.data.rheldata.rel.rodata.symtab.strtab.shstrtab.note.gnu.build-id.rel__bug_table.rel.gnu.linkonce.this_module.note.module.sig.gnu_debuglink.rel__param.modinfo__versions.bss.rel.text.rel.init.text.rel.exit.textY4$`* `* 5U H6H6a  C7I 3 J 20J}2fpil i   j u xw)8z@z #  l0L |  x?x G8P O