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" "DB "CCeLCDDDradeon_audio_calc_ctsPPradeon_dp_aux_transfer_nativeradeon_dp_destroy_mst_connectorP0radeon_dp_add_mst_connectorradeon_dp_mst_get_ddc_modesradeon_connector_dpms кradeon_dp_create_fake_mst_encoderradeon_mst_encoder_mode_setradeon_mst_encoder_commitradeon_mst_encoder_prepare radeon_mst_mode_fixupradeon_mst_encoder_dpmsradeon_dp_mst_set_stream_attribradeon_dp_mst_set_be_cntlradeon_dp_mst_check_statusradeon_dp_mst_proberadeon_dp_mst_prepare_pllradeon_mst_find_connector****************************8)`)`)`)`)`)GGG~GwGpGiGiGbG[G[GTGMGFG?G8G1GGGG5J(m8mlHmlradeon_acpi_initradeon_atcs_verify_interfaceradeon_atcs_callradeon_atif_verify_interfaceradeon_atif_callradeon_atif_get_notification_paramsradeon_acpi_eventradeon_atif_handlerradeon_atif_get_sbios_requests  (<8 DLP X  8 $:, 0 8hlptx|  $(,048<@DHLPTX\`dhlptx|  $(,048<@DHLPTX\`dhlptx|HT`lx ,8DP\ht   ( 4 @ L X d p |              $ 0 < H T ` l x               , 8 D P \ h t                          $(,048<@DHLPTX\`dhlptx|  $(,048<@DHLPTX\`dhlptx| (,8<HLX\hl (,8<HLX\hlx| w 9! (p ,8<HE LX \h lx|O  $(,048<@DHLPTX\`dhlp  $(  $ ( , 0 78 w < @ ZD         !!! !!!!! !$!(!,!0!4!8!D>H>L>P>T>X>\>`>d>h>l>p>t>x>|>>>>>>>>>>>>>>>>>>>>>>>>>>.>>u>>???@?.P?T?uX?\?`?t?x?|??.??u?????@.@@u@@4@8@<@A.AAuAAAAAAB.BBuBB B@B.PBTBuXB\B`B@CDCpC tCT xC|CCCCCCCCCCCCCCCCCDDD DDDDD D$D(D,D0D4D8D[drm] VGACON disable radeon kernel modesetting. <6>[drm] radeon kernel modesetting enabled. <6>[drm] radeon userspace modesetting enabled. failing to power off - crtc active %s called without lock held, held %d owner %p %p Process %d trying to send %d buffers via drmDMA Process %d trying to get %d buffers (of %d max) wait for fifo failed status : 0x%08X 0x%08X wait idle failed status : 0x%08X 0x%08X ADVANCE_RING(): mismatch: nr: %x write: %x line: %d programming igp gart %08X %08lX %08X programming pcie %08X %08lX %08X Called with no initialization Starting radeon_do_resume_cp() radeon_do_resume_cp() complete called with bogus CP mode (%d) Cannot initialise DRM on this card This card requires a new X.org DDX for 3D PCI GART memory not allocated! could not find cp ring region! could not find ring read pointer! could not find dma buffer region! could not find GART texture region! could not find ioremap agp regions! dev_priv->ring_rptr->handle %p dev->agp_buffer_map->handle %p <6>[drm] Setting GART location based on new memory map <6>[drm] Can't use AGP base @0x%08lx, won't fit <6>[drm] GART aligned down from 0x%08x to 0x%08x <6>[drm] Setting GART location based on old memory map dev_priv->gart_buffers_offset 0x%lx Setting phys_pci_gart to %p %08lX Cannot use PCI Express without GART in FB memory failed to setup GART surface! <3>radeon_cp: Failed to register firmware <6>[drm] Loading R100 Microcode <6>[drm] Loading R200 Microcode <6>[drm] Loading R300 Microcode <6>[drm] Loading R400 Microcode <6>[drm] Loading RS690/RS740 Microcode <6>[drm] Loading RS600 Microcode <6>[drm] Loading R500 Microcode <3>radeon_cp: Failed to load firmware "%s" <3>radeon_cp: Bogus length %zu in firmware "%s" <6>[drm] writeback test succeeded in %d usecs <6>[drm] writeback test failed <6>[drm] writeback forced off box: x1=%d y1=%d x2=%d y2=%d ADVANCE_RING(): mismatch: nr: %x write: %x line: %d hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d hwprim 0x%x vfmt 0x%x %d..%d %d verts %s called without lock held, held %d owner %p %p process %d using buffer owned by %p reusing indirect: start=0x%x actual=0x%x <3>radeon: illegal depth clear request. Buggy mesa detected - please update. tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd Invalid final destination offset Invalid texture offset for unit 0 Invalid texture offset for unit 1 Invalid texture offset for unit 2 pid=%d index=%d start=%d end=%d discard=%d pid=%d index=%d count=%d discard=%d Packet size larger than size of data provided Invalid 3d packet for r100-class chip Too large payload in 3D_LOAD_VBPNTR (count=%d) Malformed 3D_LOAD_VBPNTR packet (k=%d i=%d narrays=%d count+1=%d). Invalid 3d packet for r200-class chip Invalid indx_buffer reg address %08X Invalid offset (k=%d i=%d) in 3D_LOAD_VBPNTR packet. Invalid indx_buffer offset is %08X Packet size provided larger than data provided radeon_emit_packet3_clip failed Invalid R200 cubic texture offset Invalid R100 cubic texture offset RADEON_SE_TCL_MATERIAL_EMMISSIVE_REDR200_SE_TCL_UCP_VERT_BLEND_CTLR200_SE_TCL_OUTPUT_VTX_COMP_SELR200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0called with no initialization called with invalid crtc 0x%x called with no initialization tried to enable vblank on non-existent crtc %u %s called without lock held, held %d owner %p %p ADVANCE_RING(): mismatch: nr: %x write: %x line: %d ADVANCE_RING(): mismatch: nr: %x write: %x line: %d No such registers in hardware reg=%04x sz=%d Cannot emit more than 64 values at a time (reg=%04x sz=%d) Register %04x failed check as flag=%02x Not a packet3 header (0x%08x) Expected packet3 of length %d but have only %d bytes left Too large payload in 3D_LOAD_VBPNTR (count=%d) Offset failed range check (k=%d i=%d) while processing 3D_LOAD_VBPNTR packet. Malformed 3D_LOAD_VBPNTR packet (k=%d i=%d narrays=%d count+1=%d). packet3 INDX_BUFFER without preceding 3D_DRAW_INDX_2 is illegal. 3D_DRAW_INDX_2: packet size %i, expected %i 3D_DRAW_INDX_2: expect subsequent INDX_BUFFER, but stream is too short. 3D_DRAW_INDX_2: expect subsequent INDX_BUFFER. Invalid indx_buffer reg address %08X INDX_BUFFER: buffer size %i, expected %i Unknown packet3 header (0x%08x) bad packet3 type %i at byte %d Calling r500 command on r300 card Offset failed range check (reg=%04x sz=%d) Invalid bitblt first offset is %08X Invalid bitblt second offset is %08X Invalid indx_buffer offset is %08X ADVANCE_RING(): mismatch: nr: %x write: %x line: %d called with no initialization cs ioctl valid only for R6XX & R7XX in legacy mode unable to allocate vertex buffer for swap buffer Invalid final destination offset <6>[drm] wait for fifo failed status : 0x%08X 0x%08X <6>[drm] wait idle failed status : 0x%08X 0x%08X Cannot initialise DRM on this card This card requires a new X.org DDX for 3D could not find cp ring region! could not find ring read pointer! could not find dma buffer region! could not find GART texture region! could not find ioremap agp regions! dev_priv->ring_rptr->handle %p dev->agp_buffer_map->handle %p <6>[drm] Setting GART location based on new memory map <6>[drm] Can't use AGP base @0x%08lx, won't fit <6>[drm] GART aligned down from 0x%08x to 0x%08x dev_priv->gart_vm_start 0x%08x dev_priv->gart_buffers_offset 0x%08lx Need gart offset from userspace Setting phys_pci_gart to %p %08lX <3>r600_cp: Failed to register firmware drivers/gpu/drm/radeon/r600_cp.c<6>[drm] Loading %s CP Microcode <3>r600_cp: Bogus length %zu in firmware "%s" <3>r600_cp: Failed to load firmware "%s" <6>[drm] writeback test succeeded in %d usecs <6>[drm] writeback test failed <6>[drm] writeback forced off Unable to allocate vertex buffer for blit ADVANCE_RING(): mismatch: nr: %x write: %x line: %d Requesting to copy %d bytes to a drm buffer with %d bytes space Failed to copy user data (%p) to drm buffer (%p) %dth page. Failed to allocate drm buffer object to hold %d bytes in %d pages. Failed to allocate %dth page for drm buffer with %d bytes and %d pages. Reached maximum number of debugfs components. Report so we increase RADEON_DEBUGFS_MAX_COMPONENTS. Saved %d dwords of commands on ring %d. GPU reset succeeded, trying to resume radeon_pm_late_init failed, disabling dpm <6>[drm] radeon: finishing device. GTT: %lluM 0x%016llX - 0x%016llX limiting VRAM to PCI aperture size VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used) <6>[drm] initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X). vram limit (%d) must be a power of 2 gart size (%d) must be a power of 2 invalid AGP mode %d (valid mode: -1, 0, 1, 2, 4, 8) VM size (%d) must be a power of 2 VM size (%d) to small, min is 1GB VM size (%d) too large, max is 1TB VM page table size (%d) too small VM page table size (%d) too large <4>radeon: No suitable DMA available. <4>radeon: No coherent DMA available. <6>[drm] register mmio base: 0x%08X <6>[drm] register mmio size: %u <6>[drm] doorbell mmio base: 0x%08X <6>[drm] doorbell mmio size: %u registering gem debugfs failed (%d). registering mst debugfs failed (%d). <6>[drm] radeon: acceleration disabled, skipping move tests <6>[drm] radeon: acceleration disabled, skipping sync tests <6>[drm] radeon: acceleration disabled, skipping benchmarks Unable to find PCI I/O BAR; using MMIO for ATOM IIO &rdev->mode_info.atom_context->mutex&rdev->mode_info.atom_context->scratch_mutexFailed to DMA MAP the dummy page <6>[drm] GPU not posted. posting now... Card not posted and no BIOS - ignoring include/drm/ttm/ttm_bo_driver.hInvalid callback to write register 0x%04X with 0x%08X drivers/gpu/drm/radeon/radeon_asic.cInvalid callback to read register 0x%04X <6>[drm] Forcing AGP to PCIE mode <6>[drm] Forcing AGP to PCI mode WANT_HYPERZ: invalid value %d macrotile mode array is cik+ only! BACKEND_ENABLED_MASK is si+ only! crtc %d: dist from vblank start %d NULL mode info! Returned count may be wrong. Fatal error during modeset init Error during ACPI methods call include/drm/ttm/ttm_bo_driver.hdrivers/gpu/drm/radeon/radeon_kms.cUnknown TV standard; defaulting to NTSC Unsupported ASIC_InternalSS_Info table: %d %d <6>[drm] Changing default dispclk from %dMhz to 600Mhz <6>[drm] Internal thermal controller %s fan control <6>[drm] External GPIO thermal controller %s fan control <6>[drm] ADT7473 with internal thermal controller %s fan control <6>[drm] EMC2103 with internal thermal controller %s fan control <6>[drm] Possible %s thermal controller at 0x%02x %s fan control <6>[drm] Unknown thermal controller type %d at 0x%02x %s fan control <6>[drm] Possible %s thermal controller at 0x%02x AGP aperture too small (%zuM) need at least 32M, disabling AGP Illegal AGP Mode: %d (valid %s), leaving at %d <6>[drm] AGP mode requested: %d Unable to enable AGP (mode = 0x%lx) GTT: %lluM 0x%08llX - 0x%08llX include/drm/ttm/ttm_bo_driver.hfailed to reserve rbo before unpin Bypassing hardware LUT due to 10 bit fb scanout. Wrong screen bpp (%u) or tile split (%u) Default TV standard: SCART-PAL Unknown TV standard; defaulting to NTSC <6>[drm] No TMDS info found in BIOS External TMDS Table revision: %d <6>[drm] No valid Ext TMDS info found in BIOS <6>[drm] Possible %s thermal controller at 0x%02x <6>[drm] No TV DAC info found in BIOS Found DFP table, assuming DVI connector Found CRT table, assuming VGA connector <6>[drm] Connector Table: %d (generic) <6>[drm] Connector Table: %d (ibook) <6>[drm] Connector Table: %d (powerbook external tmds) <6>[drm] Connector Table: %d (powerbook internal tmds) <6>[drm] Connector Table: %d (powerbook vga) <6>[drm] Connector Table: %d (mini external tmds) <6>[drm] Connector Table: %d (mini internal tmds) <6>[drm] Connector Table: %d (imac g5 isight) <6>[drm] Connector Table: %d (emac) <6>[drm] Connector Table: %d (rn50-power) <6>[drm] Connector Table: %d (mac x800) <6>[drm] Connector Table: %d (mac g5 9600) <6>[drm] Connector Table: %d (SAM440ep embedded board) <6>[drm] Connector Table: %d (mac g4 silver) <6>[drm] Connector table: %d (invalid) <6>[drm] No panel info found in BIOS <6>[drm] Panel info derived from registers atom firmware requested %08x %dkb >> execute %04X (len %d, WS %d, PS %d) atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X <6>PCI registers are not implemented. <6>SYSIO registers are not implemented. <6>Undefined indirect IO read method %d. ATOM: fb read beyond scratch region: %d vs. %d <6>Undefined indirect IO write method %d. ATOM: fb write beyond scratch region: %d vs. %d atombios stuck in loop for more than 5secs aborting UpdateCRTC_DoubleBufferRegistersdrivers/gpu/drm/radeon/radeon_fence.cLast signaled fence 0x%016llx Last emitted 0x%016llx Last sync to ring %d 0x%016llx fence debugfs file creation failed GPU lockup (current fence id 0x%016llx last fence id 0x%016llx on ring %d) fence failed to get scratch register fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p error waiting for ring[%d] to become idle (%ld) AGP is not enabled for memory type %u Trying to move memory with ring turned off. drivers/gpu/drm/radeon/radeon_ttm.cnothing to bind %lu pages for mreg %p back %p! failed to bind %lu pages at 0x%08X include/drm/ttm/ttm_bo_driver.hFailed setting up TTM memory accounting subsystem. Failed setting up TTM BO subsystem. failed initializing buffer object driver(%d). Failed initializing VRAM heap. <6>[drm] radeon: %uM of VRAM memory ready Failed initializing GTT heap. <6>[drm] radeon: %uM of GTT memory ready. <6>[drm] radeon: ttm finalized stealing surface reg %d from %p <6>[drm] Detected VRAM RAM=%lluM, BAR=%lluM <6>[drm] RAM width %dbits %cDR Userspace still has active objects ! drivers/gpu/drm/radeon/radeon_object.cinclude/drm/ttm/ttm_bo_driver.htrying to bind memory to uninitialized GART ! drivers/gpu/drm/radeon/radeon_gart.ctrying to unbind memory from uninitialized GART ! <6>[drm] GART: num cpu pages %u, num gpu pages %u /builddir/build/BUILD/kernel-2.6.32-642.el6/linux-2.6.32-642.el6.i686/arch/x86/include/asm/dma-mapping.hinclude/drm/ttm/ttm_bo_driver.hWrote2: 0x%08x 0x%08x 0x%08x (0x%08x) Wrote: 0x%08x 0x%08x 0x%08x (0x%08x) include/drm/ttm/ttm_bo_driver.hfailed to reserve rbo before unpin trying to scanout microtiled buffer <6>[drm] crtc %d is connected to a TV Mode need scaling but only first crtc can do that. <6>[drm] radeon legacy LVDS backlight unloaded Backlight registration failed <6>[drm] radeon legacy LVDS backlight initialized S-video TV connection detected Composite TV connection detected <6>[drm] not detecting due to %08x Determined LVDS native mode details from EDID No LVDS native mode details, disabling RMX Adding cvt approximation of native panel mode %s VGA: Failed to assign ddc bus! Check dmesg for i2c errors. DVIA: Failed to assign ddc bus! Check dmesg for i2c errors. DVI: Failed to assign ddc bus! Check dmesg for i2c errors. LVDS: Failed to assign ddc bus! Check dmesg for i2c errors. Failed to assign router i2c bus! Check dmesg for i2c errors. DP: Failed to assign ddc bus! Check dmesg for i2c errors. HDMI: Failed to assign ddc bus! Check dmesg for i2c errors. %s: HDMI deep color %d bpc unsupported. Using 8 bpc. %s: HDMI deep color %d bpc unsupported. Using 12 bpc. %s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz. %s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc. %s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc. %s: Required max tmds clock for HDMI deep color missing. Using 8 bpc. %s: Deep color disabled. Set radeon module param deep_color=1 to enable. %s: Display bpc=%d, returned bpc=%d 1: conflicting encoders switching off %s 2: conflicting encoders switching off %s hpd detected without ddc, retrying in 1 second %s: probed a monitor but no|invalid EDID %s: detected RS690 floating bus bug, stopping ddc detect setting active device to %08x from %08x %08x for encoder %d <6>[drm] Radeon Display Connectors <6>[drm] DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x <6>[drm] DDC Router 0x%x/0x%x <6>[drm] Clock/Data Router 0x%x/0x%x <6>[drm] DDC: no ddc bus - possible BIOS bug - please report to xorg-driver-ati@lists.x.org %d - %d, pll dividers - fb: %d.%d ref: %d, post %d radeon_crtc->flip_status = %d != RADEON_FLIP_SUBMITTED(%d) %lld %d, pll dividers - fb: %d.%d ref: %d, post %d Scaling not consistent across encoder. failed to wait on page flip fence (%d)! include/drm/ttm/ttm_bo_driver.hfailed to unpin buffer after flip failed to reserve buffer after flip flip-ioctl() cur_rbo = %p, new_rbo = %p failed to pin new rbo buffer before flip failed to get vblank before flip flip queue: crtc already busy failed to unpin new rbo in error path failed to reserve new rbo buffer before flip failed to reserve new rbo in error path No GEM object associated to handle 0x%08X, can't create framebuffer drivers/gpu/drm/radeon/radeon_cursor.cbad cursor width or height %d x %d Cannot find cursor object %x for crtc %d include/drm/ttm/ttm_bo_driver.hFailed to pin new cursor BO (%d) i2c 0x%02x 0x%02x write failed i2c 0x%02x 0x%02x read failed <6>[drm] hw_i2c forced on, you may experience display detection problems! Failed to register bit i2c %s gpio not supported with hw i2c <6>[drm] Using generic clock info include/drm/ttm/ttm_bo_driver.h<3>failed to allocate framebuffer (%d) failed to create fbcon object %d failed to initialize framebuffer %d <6>[drm] fb mappable at 0x%lX bo[0x%08x] %8ldkB %8ldMB %s pid %8ld Allocation size %ldMb bigger than %ldMb limit Failed to allocate GEM object (%ld, %d, %u, %d) include/drm/ttm/ttm_bo_driver.h<4>Set domain without domain ! <3>Failed to wait for object: %li offset 0x%lX is in reserved area 0x%X invalid flags 0x%08X vs 0x%08X radeon: writing more dwords to the ring than expected! ring %d stalled for more than %llumsec rptr next(0x%04x): 0x%08x [%5d] driver's copy of the wptr: 0x%08x [%5d] last semaphore signal addr : 0x%016llx last semaphore wait addr : 0x%016llx include/drm/ttm/ttm_bo_driver.hFailed to register debugfs file for rings ! <6>[drm] radeon: irq initialized. Can not parse packet at %d after CS end %d ! Unknown packet type %d at %d ! Packet (%d:%d:%d) end after CS buffer (%d) ! No packet3 for relocation for packet at %d. Relocs at %d after relocations chunk end %d ! gem object lookup failed 0x%x RADEON_GEM_DOMAIN_CPU is not valid for command submission Only RADEON_GEM_DOMAIN_GTT is allowed for userptr BOs Failed to initialize parser ! Failed to parse relocation %d! failed to evaluate ATRM got %s ACPI VFCT table present but broken (too short #1) ACPI VFCT table present but broken (too short #2) <6>[drm] ACPI VFCT contains a BIOS for %02x:%02x.%d %04x:%04x, size %d <6>[drm] ACPI VFCT table is not for this card BIOS signature incorrect %x %x <6>[drm] Not an x86 BIOS ROM, not using. include/drm/ttm/ttm_bo_driver.h<6>[drm] radeon: %s %u bo moves of %u kB from %d to %d in %u ms, throughput: %u Mb/s or %u MB/s Error while benchmarking BO move. pitch %d use_pitch %d width %d width_11 %d height %d height_11 %d num levels %d depth %d bpp %d coordinate type %d width round to power of 2 %d height round to power of 2 %d compress format %d [drm] Buffer too small for PACKET3 INDX_BUFFER (need %u have %lu) ! Requested mode for not defined action [drm] No buffer for color buffer %d ! [drm] Buffer too small for color buffer %d (need %lu have %lu) ! [drm] color buffer %d (%u %u %u %u) [drm] No buffer for z buffer ! [drm] Buffer too small for z buffer (need %lu have %lu) ! [drm] No buffer for AA resolve buffer %d ! [drm] Buffer too small for AA resolve buffer %d (need %lu have %lu) ! [drm] AA resolve buffer %d (%u %u %u %u) (PW %u) Vertex array %u no buffer bound (PW %u) Vertex array %u need %lu dwords have %lu dwords IMMD draw %u dwors but needs %lu dwords VAP_VF_CNTL.NUM_VERTICES %u, VTX_SIZE %u [drm] Invalid primitive walk %d for VAP_VF_CNTL Cube texture offset greater than object size %lu %lu Invalid texture coordinate type %u for unit %u Texture of unit %u needs %lu bytes but is %lu Only 16 vertex buffers are allowed %d PRIM_WALK must be 3 for IMMD draw Packet3 opcode %x not supported Cannot src blit from microtiled surface vline wait had illegal wait until segment vline wait had illegal wait until Invalid color buffer format (%d) ! <3>Forbidden register 0x%04X in cs at %d R100 PCI GART already initialized radeon: writing more dwords to the ring than expected! radeon: moving bo (%d) asking for %u dw. <4>radeon: wait for empty RBBM fifo failed ! Bad things might happen. Can't enable IRQ/MSI because no handler is installed Update pending now high. Unlocking vupdate_lock. <4>Failed to wait GUI idle while programming pipes. Bad things might happen. <6>[drm] radeon: cp finalized Wait for CP idle timeout, shutting down CP. <6>[drm] PCI GART of %uM enabled (table at 0x%016llX). Failed to register debugfs file for CP ! <6>[drm] Loading R100 Microcode <6>[drm] Loading R200 Microcode <6>[drm] Loading R300 Microcode <6>[drm] Loading R400 Microcode <6>[drm] Loading RS690/RS740 Microcode <6>[drm] Loading RS600 Microcode <6>[drm] Loading R500 Microcode <3>radeon_cp: Failed to load firmware "%s" <3>radeon_cp: Bogus length %zu in firmware "%s" <6>[drm] radeon: ring at 0x%016lX radeon: cp isn't working (%d). failed to get scratch reg for rptr save (%d). radeon: cp failed to get scratch reg (%d). radeon: cp failed to lock ring (%d). <6>[drm] ring test succeeded in %d usecs radeon: ring test failed (scratch(0x%04X)=0x%08X) radeon: failed to get scratch reg (%d). radeon: failed to get ib (%d). radeon: failed to schedule ib (%d). radeon: fence wait failed (%d). <6>[drm] ib test succeeded in %u usecs radeon: ib test failed (scratch(0x%04X)=0x%08X) <6>[drm] Generation 2 PCI interface, using max accessible memory <6>[drm] Generation 1 PCI interface in multifunction mode <6>[drm] Limiting VRAM to one aperture failed initializing CP fences (%d). IB initialization failed (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Failed to create r100_mc debugfs file. Expecting combios for RS400/RS480 GPU You may not have enough display bandwidth for current mode If you have flickering problem, try to lower resolution, refresh rate, or color depth PRIM_WALK must be 3 for IMMD draw Packet3 opcode %x not supported Invalid RB3D_CCTL: Cannot enable CMASK. Invalid color buffer format (%d)! Invalid color buffer format (%d) ! Invalid z buffer format (%d) ! <3>Forbidden register 0x%04X in cs at %d (val=%08x) RV370 PCIE GART already initialized Failed to register debugfs file for PCIE gart ! No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). Failed to create r100_mc debugfs file. <6>[drm] Failed to wait MC idle before programming MC. <4>Failed to wait GUI idle while programming pipes. Bad things might happen. <4>Failed to wait MC idle while programming pipes. Bad things might happen. <6>[drm] radeon: %d quad pipes, %d Z pipes initialized. failed initializing CP fences (%d). IB initialization failed (%d). Expecting combios for RS400/RS480 GPU GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) radeon: writing more dwords to the ring than expected! radeon: writing more dwords to the ring than expected! <4>Failed to wait GUI idle while programming pipes. Bad things might happen. <6>[drm] radeon: %d quad pipes, %d z pipes initialized. failed initializing CP fences (%d). IB initialization failed (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Failed to register debugfs file for RBBM ! Failed to register debugfs file for pipes ! Unable to use IGP GART size %uM Valid GART size for IGP are 32M,64M,128M,256M,512M,1G,2G RS400 GART already initialized drivers/gpu/drm/radeon/rs400.cFailed to register debugfs file for RS400 GART ! rs400: Wait MC idle timeout before updating MC. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). <4>rs400: Failed to wait MC idle while programming pipes. Bad things might happen. %08x failed initializing CP fences (%d). IB initialization failed (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting combios for RS400/RS480 GPU AGP_ADDRESS_SPACE_SIZE 0x%08x MC_GART_ERROR_ADDRESS_HI 0x%08x Update pending now high. Unlocking vupdate_lock. Can't enable IRQ/MSI because no handler is installed drivers/gpu/drm/radeon/rs600.cWait MC idle timeout before updating MC. No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). failed initializing CP fences (%d). IB initialization failed (%d). Expecting atombios for RS600 GPU GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Failed to register debugfs file for RBBM ! RS600 GART already initialized Wait MC idle timeout before updating MC. <4>Failed to wait MC idle while programming pipes. Bad things might happen. failed initializing CP fences (%d). IB initialization failed (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) No integrated system info for your GPU, using safe default Expecting atombios for RV515 GPU <6>[drm] Direct mapping: aper base at 0x%llx, replaced by direct mapping base 0x%llx. Failed to register debugfs file for RBBM ! Failed to register debugfs file for pipes ! radeon: writing more dwords to the ring than expected! Wait MC idle timeout before updating MC. <4>Failed to wait GUI idle while resetting GPU. Bad things might happen. <4>Failed to wait MC idle while programming pipes. Bad things might happen. failed initializing CP fences (%d). IB initialization failed (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting atombios for RV515 GPU Wait MC idle timeout before updating MC. <4>Failed to wait MC idle while programming pipes. Bad things might happen. failed initializing CP fences (%d). IB initialization failed (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting atombios for RV515 GPU <6>[drm] GPU not posted. posting now... invalid pcie lane request: %d Requested mode for not defined action failed to get scratch reg for rptr save (%d). <6>[drm] Loading %s Microcode <3>r600_cp: Bogus length %zu in firmware "%s" <3>r600_rlc: Bogus length %zu in firmware "%s" <3>smc: error loading firmware "%s" <3>smc: Bogus length %zu in firmware "%s" <3>r600_cp: Failed to load firmware "%s" R600 PCIE GART already initialized radeon: failed to create ih ring buffer (%d). include/drm/ttm/ttm_bo_driver.hradeon: failed to pin ih ring buffer (%d). radeon: failed to map ih ring buffer (%d). <6>[drm] PCIE gen 2 link speeds already enabled <6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0 radeon: writing more dwords to the ring than expected! R_008010_GRBM_STATUS = 0x%08X R_008014_GRBM_STATUS2 = 0x%08X R_000E50_SRBM_STATUS = 0x%08X R_008674_CP_STALLED_STAT1 = 0x%08X R_008678_CP_STALLED_STAT2 = 0x%08X R_00867C_CP_BUSY_STAT = 0x%08X R_008680_CP_STAT = 0x%08X R_00D034_DMA_STATUS_REG = 0x%08X R_000E50_SRBM_STATUS : 0x%08X radeon: cp failed to lock ring (%d). radeon: cp failed to get scratch reg (%d). radeon: cp failed to lock ring %d (%d). <6>[drm] ring test on %d succeeded in %d usecs radeon: ring %d test failed (scratch(0x%04X)=0x%08X) radeon: failed to get scratch reg (%d). radeon: failed to get ib (%d). radeon: failed to schedule ib (%d). radeon: fence wait failed (%d). <6>[drm] ib test on ring %d succeeded in %u usecs radeon: ib test failed (scratch(0x%04X)=0x%08X) IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X) <4>[drm] r600 flush TLB failed No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). Can't enable IRQ/MSI because no handler is installed failed initializing CP fences (%d). failed initializing UVD fences (%d). radeon: failed initializing UVD (%d). IB initialization failed (%d). r600 startup failed on resume r600_irq_process start: rptr %d, wptr %d IH: D1 vblank - IH event w/o asserted irq bit? IH: D1 vline - IH event w/o asserted irq bit? IH: D2 vblank - IH event w/o asserted irq bit? IH: D2 vline - IH event w/o asserted irq bit? IH: HPD1 - IH event w/o asserted irq bit? IH: HPD2 - IH event w/o asserted irq bit? IH: HPD3 - IH event w/o asserted irq bit? IH: HPD4 - IH event w/o asserted irq bit? IH: HPD5 - IH event w/o asserted irq bit? IH: HPD6 - IH event w/o asserted irq bit? IH: HDMI0 - IH event w/o asserted irq bit? IH: HDMI1 - IH event w/o asserted irq bit? Failed to register debugfs file for mc ! Expecting atombios for R600 GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used) <6>[drm] Direct mapping: aper base at 0x%llx, replaced by direct mapping base 0x%llx. R_008020_GRBM_SOFT_RESET=0x%08X VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used) Update pending now high. Unlocking vupdate_lock. <6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0 No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). failed initializing CP fences (%d). failed initializing DMA fences (%d). radeon: failed initializing UVD (%d). IB initialization failed (%d). r600 startup failed on resume Expecting atombios for R600 GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... Failed to get dummy create msg Failed to get dummy destroy msg Fence A signaled without waiting for semaphore. Fence B signaled without waiting for semaphore. Neither fence A nor B has been signaled Both fence A and B has been signaled <6>[drm] Fence %c was first signaled Failed to wait for sync fence A Failed to wait for sync fence B <4>Error while testing ring sync (%d). Fence 1 signaled without waiting for semaphore. Failed to wait for sync fence 1 Fence 2 signaled without waiting for semaphore. <6>[drm] Testing syncing between rings %d and %d... <6>[drm] Testing syncing between rings %d, %d and %d... Failed to allocate %d pointers include/drm/ttm/ttm_bo_driver.hFailed to create GTT object %d Failed to wait for GTT->VRAM fence %d Failed to map VRAM object after copy %d Incorrect GTT->VRAM copy %d: Got 0x%p, expected 0x%p (GTT/VRAM offset 0x%16llx/0x%16llx) Failed to wait for VRAM->GTT fence %d Failed to map GTT object after copy %d Incorrect VRAM->GTT copy %d: Got 0x%p, expected 0x%p (VRAM/GTT offset 0x%16llx/0x%16llx) <6>[drm] Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx <4>Error while testing BO move. Invalid color buffer format (%d) ! No support for depth xy offset in kms <3>Forbidden register 0x%04X in cs at %d radeon: writing more dwords to the ring than expected! compute_restarts: def = %u h = %d v = %d, p1 = %04x, p2 = %04x, restart = %d compute_restart: F/H/V=%u,%u,%u compute_restart: h_size = %d h_inc = %d Relocs at %d after relocations chunk end %d ! Can not parse packet at %d after CS end %d ! DMA write buffer too small (%llu %lu) DMA copy src buffer too small (%llu %lu) DMA write dst buffer too small (%llu %lu) DMA constant fill buffer too small (%llu %lu) Unknown packet type %d at %d ! streamout %d bo too small: 0x%llx, 0x%lx %s:%d mask 0x%08X | 0x%08X no cb for %d %s:%d cb invalid format %d for %d (0x%08X) %s invalid tiling %d for %d (0x%08X) %s:%d cb pitch (%d, 0x%x, %d) invalid %s:%d cb height (%d, 0x%x, %d) invalid %s offset[%d] 0x%llx 0x%llx, %d not aligned %s offset[%d] %d %llu %d %lu too big (%d %d) (%d %d %d) %s FMASK_TILE_MAX too large (tile_max=%u, bytes=%u, offset=%llu, bo_size=%lu) %s CMASK_BLOCK_MAX too large (block_max=%u, bytes=%u, offset=%llu, bo_size=%lu) z/stencil with no depth buffer z/stencil with invalid format %d z/stencil buffer size not set z/stencil buffer too small (0x%08X %d %d %ld) %s invalid tiling %d (0x%08X) %s:%d db pitch (%d, 0x%x, %d) invalid %s:%d db height (%d, 0x%x, %d) invalid %s offset 0x%llx, 0x%llx, %d not aligned z/stencil buffer (%d) too small (0x%08X %d %d %d -> %u have %lu) %s:%d htile enabled without htile surface 0x%08x %s:%d htile can't be enabled with bogus db_depth_size 0x%08x %s:%d htile surface too small %ld for %ld (%d %d) forbidden register 0x%08x at %d missing reloc for CP_COHER_BASE 0x%04X Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X vline wait missing WAIT_REG_MEM segment vline WAIT_REG_MEM waiting on MEM instead of REG vline WAIT_REG_MEM waiting on PFP instead of ME vline WAIT_REG_MEM function not equal vline WAIT_REG_MEM bad bit mask <3>Forbidden register 0x%04X in cs at %d bad SET PREDICATION operation %d CP DMA SAIC only supported for registers CP DMA src buffer too small (%llu %lu) CP DMA DAIC only supported for registers CP DMA dst buffer too small (%llu %lu) %s:%d texture invalid format %d %s:%d tex array mode (%d) invalid %s:%d tex pitch (%d, 0x%x, %d) invalid %s:%d tex base offset (0x%llx, 0x%llx, %d) invalid %s:%d tex mip offset (0x%llx, 0x%llx, %d) invalid texture blevel %d > llevel %d texture bo too small ((%d %d) (%d %d) %d %d %d -> %d have %ld) vbo resource seems too big (%d) for the bo (%ld) STRMOUT_BASE_UPDATE only supported on 7xx bad STRMOUT_BASE_UPDATE packet count bad STRMOUT_BASE_UPDATE index bad STRMOUT_BASE_UPDATE reloc bad STRMOUT_BASE_UPDATE, bo does not match bad STRMOUT_BASE_UPDATE, bo offset does not match: 0x%llx, 0x%x bad STRMOUT_BASE_UPDATE bo too small: 0x%llx, 0x%lx bad STRMOUT_BUFFER_UPDATE (invalid count) bad STRMOUT_BUFFER_UPDATE (missing dst reloc) bad STRMOUT_BUFFER_UPDATE dst bo too small: 0x%llx, 0x%lx bad STRMOUT_BUFFER_UPDATE (missing src reloc) bad STRMOUT_BUFFER_UPDATE src bo too small: 0x%llx, 0x%lx bad MEM_WRITE (invalid count) bad MEM_WRITE (missing reloc) bad MEM_WRITE (address not qwords aligned) bad MEM_WRITE bo too small: 0x%llx, 0x%lx bad COPY_DW (missing src reloc) bad COPY_DW src bo too small: 0x%llx, 0x%lx bad COPY_DW (missing dst reloc) bad COPY_DW dst bo too small: 0x%llx, 0x%lx Packet3 opcode %x not supported Failed to initialize parser ! not in vbl for pm change %08x at %s radeon: dynamic power management deactivated radeon: dynamic power management activated failed to create device file for dpm state failed to create device file for power profile failed to create device file for power method radeon_pm_late_init failed, disabling dpm Unable to register hwmon device: %d Unable to create hwmon sysfs file: %d Debugfs support not implemented for this asic default engine clock: %u0 kHz current engine clock: %u0 kHz default memory clock: %u0 kHz current memory clock: %u0 kHz Failed to register debugfs file for dpm! <6>[drm] radeon: dpm initialized radeon: dpm initialization failed Failed to register debugfs file for PM! <6>[drm] radeon: power management initialized power_dpm_force_performance_levelrequested signal parameters: lane %d voltage %s pre_emph %s using signal parameters: voltage %s pre_emph %s displayport link status failed clock recovery reached max voltage clock recovery at voltage %d pre-emphasis %d channel eq at voltage %d pre-emphasis %d drm_dp_aux_register() failed with error %d drivers/gpu/drm/radeon/atombios_dp.cUnknown bits per sample 0x%x, using 16 Invalid encoder for HDMI: 0x%X %sabling HDMI interface @ 0x%04X for encoder 0x%x %s with %d channels, %d Hz sampling rate, %d bits per sample, 0x%02X IEC60958 status bits and 0x%02X category code failed to setup audio infoframe failed to pack audio infoframe <6>[drm] PCIE gen 2 link speeds already enabled <6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0 radeon: writing more dwords to the ring than expected! include/drm/ttm/ttm_bo_driver.h(%d) reserve RLC sr bo failed (%d) reserve RLC cp table bo failed (%d) create RLC cp table bo failed (%d) pin RLC cp_table bo failed (%d) map RLC cp table bo failed GRBM_STATUS = 0x%08X GRBM_STATUS_SE0 = 0x%08X GRBM_STATUS_SE1 = 0x%08X SRBM_STATUS = 0x%08X SRBM_STATUS2 = 0x%08X R_008674_CP_STALLED_STAT1 = 0x%08X R_008678_CP_STALLED_STAT2 = 0x%08X R_00867C_CP_BUSY_STAT = 0x%08X R_008680_CP_STAT = 0x%08X R_00D034_DMA_STATUS_REG = 0x%08X R_00D834_DMA_STATUS_REG = 0x%08X <4>[drm] r600 flush TLB failed No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). radeon: cp failed to lock ring (%d). IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X) Can't enable IRQ/MSI because no handler is installed drivers/gpu/drm/radeon/evergreen.cevergreen_irq_set: sw int gfx evergreen_irq_set: sw int cp1 evergreen_irq_set: sw int cp2 evergreen_irq_process start: rptr %d, wptr %d IH: D1 vblank - IH event w/o asserted irq bit? IH: D1 vline - IH event w/o asserted irq bit? IH: D2 vblank - IH event w/o asserted irq bit? IH: D2 vline - IH event w/o asserted irq bit? IH: D3 vblank - IH event w/o asserted irq bit? IH: D3 vline - IH event w/o asserted irq bit? IH: D4 vblank - IH event w/o asserted irq bit? IH: D4 vline - IH event w/o asserted irq bit? IH: D5 vblank - IH event w/o asserted irq bit? IH: D5 vline - IH event w/o asserted irq bit? IH: D6 vblank - IH event w/o asserted irq bit? IH: D6 vline - IH event w/o asserted irq bit? IH: IH event w/o asserted irq bit? GPU fault detected: %d 0x%08x VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X failed initializing CP fences (%d). failed initializing DMA fences (%d). radeon: error initializing UVD (%d). IB initialization failed (%d). Expecting atombios for evergreen GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... radeon: MC ucode required for NI+. evergreen startup failed on resume bad DMA_PACKET_WRITE [%6d] 0x%08x sub cmd is not 0 or 8 bad DMA_PACKET_COPY [%6d] 0x%08x invalid sub cmd Unknown packet type %d at %d ! CP DMA command requires dw count alignment Can not parse packet at %d after CS end %d ! DMA write buffer too small (%llu %lu) DMA L2L, dw src buffer too small (%llu %lu) DMA L2L, dw dst buffer too small (%llu %lu) DMA L2T, src buffer too small (%llu %lu) DMA L2T, dst buffer too small (%llu %lu) DMA L2L, byte src buffer too small (%llu %lu) DMA L2L, byte dst buffer too small (%llu %lu) bad L2L, dw, broadcast DMA_PACKET_COPY DMA L2L, dw, broadcast src buffer too small (%llu %lu) DMA L2L, dw, broadcast dst buffer too small (%llu %lu) DMA L2L, dw, broadcast dst2 buffer too small (%llu %lu) bad L2T, frame to fields DMA_PACKET_COPY DMA L2T, frame to fields src buffer too small (%llu %lu) DMA L2T, frame to fields buffer too small (%llu %lu) L2T, T2L Partial is cayman only ! bad L2T, broadcast DMA_PACKET_COPY DMA L2T, broadcast src buffer too small (%llu %lu) DMA L2T, broadcast dst buffer too small (%llu %lu) DMA L2T, broadcast dst2 buffer too small (%llu %lu) DMA L2T, T2L src buffer too small (%llu %lu) DMA L2T, T2L dst buffer too small (%llu %lu) DMA constant fill buffer too small (%llu %lu) %s:%d %s invalid array mode %d %s:%d %s invalid number of banks %d %s:%d %s invalid macro tile aspect %d %s:%d %s invalid tile split %d %s:%d htile enabled without htile surface 0x%08x %s:%d htile surface too small %ld for %ld (%d %d) missing reloc for CP_COHER_BASE 0x%04X forbidden register 0x%08x at %d %s:%d %s pitch %d invalid must be aligned with %d %s:%d %s pitch %d invalid must be aligned with %d (%d %d %d) %s:%d %s height %d invalid must be aligned with 8 %s:%d %s height %d invalid must be aligned with %d streamout %d bo too small: 0x%llx, 0x%lx %s:%d mask 0x%08X | 0x%08X no cb for %d %s:%d cb invalid format %d for %d (0x%08x) %s:%d cb[%d] invalid (0x%08x 0x%08x 0x%08x 0x%08x) %s:%d cb[%d] bo base %ld not aligned with %ld %s:%d cb[%d] bo too small (layer size %d, offset %d, max layer %d, bo size %ld, slice %d) %s:%d problematic surf: (%d %d) (%d %d %d %d %d %d %d) %s:%d stencil invalid format %d %s:%d stencil invalid (0x%08x 0x%08x 0x%08x 0x%08x) %s:%d stencil read bo base %ld not aligned with %ld %s:%d stencil read bo too small (layer size %d, offset %ld, max layer %d, bo size %ld) %s:%d stencil write bo base %ld not aligned with %ld %s:%d stencil write bo too small (layer size %d, offset %ld, max layer %d, bo size %ld) %s:%d depth invalid format %d %s:%d depth invalid (0x%08x 0x%08x 0x%08x) %s:%d depth read bo too small (layer size %d, offset %ld, max layer %d, bo size %ld) %s:%d depth write bo too small (layer size %d, offset %ld, max layer %d, bo size %ld) bad SET PREDICATION operation %d bad INDEX_TYPE/NUM_INSTANCES/CLEAR_STATE DRAW_INDIRECT buffer too small %u + %llu > %lu CP DMA SAIC only supported for registers CP DMA src buffer too small (%llu %lu) CP DMA DAIC only supported for registers CP DMA dst buffer too small (%llu %lu) %s:%d texture invalid format %d %s:%d texture invalid 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x %s:%d texture bo base %ld not aligned with %ld %s:%d mipmap bo base %ld not aligned with %ld %s:%d texture bo too small (layer size %d, offset %ld, max layer %d, depth %d, bo size %ld) (%d %d) %s:%i got NULL MIP_ADDRESS relocation %s:%d mipmap [%d] bo too small (layer size %d, offset %ld, coffset %ld, max layer %d, depth %d, bo size %ld) level0 (%d %d %d) vbo resource seems too big for the bo bad STRMOUT_BUFFER_UPDATE (invalid count) bad STRMOUT_BUFFER_UPDATE (missing dst reloc) bad STRMOUT_BUFFER_UPDATE dst bo too small: 0x%llx, 0x%lx bad STRMOUT_BUFFER_UPDATE (missing src reloc) bad STRMOUT_BUFFER_UPDATE src bo too small: 0x%llx, 0x%lx bad MEM_WRITE (invalid count) bad MEM_WRITE (missing reloc) bad MEM_WRITE (address not qwords aligned) bad MEM_WRITE bo too small: 0x%llx, 0x%lx bad COPY_DW (missing src reloc) bad COPY_DW src bo too small: 0x%llx, 0x%lx bad COPY_DW (missing dst reloc) bad COPY_DW dst bo too small: 0x%llx, 0x%lx Packet3 opcode %x not supported <3>Forbidden register 0x%04X in cs at %d %s: Disabling hdmi deep color for %d bpc. %s: Enabling hdmi deep color 30 for 10 bpc. %s: Enabling hdmi deep color 36 for 12 bpc. %sabling HDMI interface @ 0x%04X for encoder 0x%x drivers/gpu/drm/radeon/./radeon_trace.hsoffs=%010llx, eoffs=%010llx, flags=%08x pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u pd_addr=%010Lx, ring=%u, id=%u ring=%u, waiters=%d, addr=%010Lx VM fault (0x%02x, vmid %d) at page %u, %s from %s (%d) <6>[drm] Loading %s Microcode <3>ni_cp: Bogus length %zu in firmware "%s" <3>ni_rlc: Bogus length %zu in firmware "%s" <3>ni_mc: Bogus length %zu in firmware "%s" <3>smc: error loading firmware "%s" <3>ni_cp: Failed to load firmware "%s" radeon: writing more dwords to the ring than expected! radeon: cp failed to lock ring (%d). No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). failed initializing CP fences (%d). failed initializing DMA fences (%d). radeon: failed initializing UVD (%d). radeon: failed initializing VCE (%d). IB initialization failed (%d). vm manager initialization failed (%d). cayman startup failed on resume Expecting atombios for cayman GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... radeon: MC ucode required for NI+. VM_CONTEXT0_PROTECTION_FAULT_ADDR 0x%08X VM_CONTEXT0_PROTECTION_FAULT_STATUS 0x%08X VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X LVDS required digital encoder 2 but it was in use - stealing Got encoder index incorrect - returning 0 <6>[drm] radeon atom LVDS backlight unloaded Unknown table version: %d, %d Backlight registration failed <6>[drm] radeon atom DIG backlight initialized encoder dpms %d to mode %d, devices %08x, active_devices %08x semaphore %p has more waiters than signalers, hardware lockup imminent! [0x%010llx 0x%010llx] size %8lld protected by 0x%016llx on ring %ddrivers/gpu/drm/radeon/radeon_sa.csa_manager is not empty, clearing anyway (%d) failed to allocate bo for manager include/drm/ttm/ttm_bo_driver.h(%d) failed to pin manager bo (%d) failed to reserve manager bo hw i2c: tried to write too many bytes (%d vs 3) Invalid Compute packet3: 0x%x radeon: writing more dwords to the ring than expected! No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). radeon: cp failed to lock ring (%d). IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X) si_irq_process start: rptr %d, wptr %d IH: IH event w/o asserted irq bit? GPU fault detected: %d 0x%08x VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X VM fault (0x%02x, vmid %d) at page %u, %s from %s (%d) Can't enable IRQ/MSI because no handler is installed <6>[drm] PCIE gen 3 link speeds already enabled <6>[drm] enabling PCIE gen 3 link speeds, disable with radeon.pcie_gen2=0 <6>[drm] PCIE gen 2 link speeds already enabled <6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0 failed initializing CP fences (%d). failed initializing DMA fences (%d). radeon: failed initializing UVD (%d). radeon: failed initializing VCE (%d). IB initialization failed (%d). vm manager initialization failed (%d). Expecting atombios for cayman GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... <6>[drm] Probable bad vram size: 0x%08x <6>[drm] Loading %s Microcode <3>si_cp: Bogus length %zu in firmware "%s" <3>si_cp: validation failed for firmware "%s" <3>si_rlc: Bogus length %zu in firmware "%s" <3>si_mc: Bogus length %zu in firmware "%s" <3>smc: error loading firmware "%s" <3>si_smc: Bogus length %zu in firmware "%s" <3>si_fw: mixing new and old firmware! <3>si_cp: Failed to load firmware "%s" radeon: MC ucode required for NI+. include/drm/ttm/ttm_bo_driver.hwriting beyond doorbell aperture: 0x%08x! reading beyond doorbell aperture: 0x%08x! <6>[drm] Loading %s Microcode <3>cik_cp: Bogus length %zu in firmware "%s" <3>cik_fw: validation failed for firmware "%s" <3>cik_rlc: Bogus length %zu in firmware "%s" <3>cik_sdma: Bogus length %zu in firmware "%s" <3>cik_mc: Bogus length %zu in firmware "%s" <3>smc: error loading firmware "%s" <3>cik_smc: Bogus length %zu in firmware "%s" <3>ci_fw: mixing new and old firmware! <3>cik_cp: Failed to load firmware "%s" include/drm/ttm/ttm_bo_driver.h(%d) reserve HPD EOP bo failed radeon: writing more dwords to the ring than expected! SDMA0_STATUS_REG = 0x%08X SDMA1_STATUS_REG = 0x%08X CP_CPF_STALLED_STAT1 = 0x%08x CP_CPC_STALLED_STAT1 = 0x%08x No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). unknown num pipe config: 0x%x radeon: failed to get scratch reg (%d). radeon: failed to get ib (%d). radeon: failed to schedule ib (%d). radeon: fence wait failed (%d). <6>[drm] ib test on ring %d succeeded in %u usecs radeon: ib test failed (scratch(0x%04X)=0x%08X) radeon: cp failed to get scratch reg (%d). radeon: cp failed to lock ring %d (%d). <6>[drm] ring test on %d succeeded in %d usecs radeon: ring %d test failed (scratch(0x%04X)=0x%08X) Can't enable IRQ/MSI because no handler is installed si_irq_set: sw int cp1 invalid pipe %d si_irq_set: sw int cp1 invalid me %d si_irq_set: sw int cp2 invalid pipe %d si_irq_set: sw int cp2 invalid me %d radeon: cp failed to lock ring (%d). IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X) cik_irq_process start: rptr %d, wptr %d IH: IH event w/o asserted irq bit? GPU fault detected: %d 0x%08x VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d) Illegal register access in command stream Illegal instruction in command stream Illegal instruction in SDMA command stream <6>[drm] PCIE gen 3 link speeds already enabled <6>[drm] enabling PCIE gen 3 link speeds, disable with radeon.pcie_gen2=0 <6>[drm] PCIE gen 2 link speeds already enabled <6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0 (%d) create HDP EOP bo failed failed initializing CP fences (%d). failed initializing DMA fences (%d). radeon: failed initializing UVD (%d). radeon: failed initializing VCE (%d). IB initialization failed (%d). vm manager initialization failed (%d). Expecting atombios for cayman GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... radeon: MC ucode required for NI+. power level 0 sclk: %u vddc_index: %d power level 1 sclk: %u vddc_index: %d No integrated system info for your GPU power level 0 sclk: %u vddc_index: %d power level 1 sclk: %u vddc_index: %d power level 0 sclk: %u mclk: %u vddc: %u power level 1 sclk: %u mclk: %u vddc: %u power level 2 sclk: %u mclk: %u vddc: %u power level %d sclk: %u mclk: %u vddc: %u power level 0 sclk: %u mclk: %u vddc: %u vddci: %u power level 1 sclk: %u mclk: %u vddc: %u vddci: %u power level 2 sclk: %u mclk: %u vddc: %u vddci: %u power level 0 sclk: %u mclk: %u vddc: %u power level 1 sclk: %u mclk: %u vddc: %u power level 2 sclk: %u mclk: %u vddc: %u rv770_restrict_performance_levels_before_switch failed power level %d sclk: %u mclk: %u vddc: %u vddci: %u power level %d sclk: %u mclk: %u vddc: %u Could not enable thermal interrupts. rv770_construct_vddc_table failed Target MCLK greater than largest MCLK in DLL speed table Invalid encoded Reference Divider unknown asic in smc ucode loader drivers/gpu/drm/radeon/rv770_smc.crv770_restrict_performance_levels_before_switch failed cypress_upload_sw_state failed cypress_upload_mc_reg_table failed cypress_construct_voltage_tables failed cypress_get_mvdd_configuration failed cypress_get_table_locations failed cypress_init_smc_table failed cypress_populate_mc_reg_table failed cypress_notify_smc_display_change failed power level %d sclk: %u mclk: %u vddc: %u vddci: %u rv770_restrict_performance_levels_before_switch failed cypress_upload_sw_state failed cypress_upload_mc_reg_table failed btc_set_power_state_conditionally_enable_ulv failed cypress_construct_voltage_tables failed cypress_get_mvdd_configuration failed cypress_get_table_locations failed cypress_populate_mc_reg_table failed cypress_notify_smc_display_change failed power level %d sclk: %u vddc: %u The htcTmpLmt should be larger than htcHystLmt. power level %d sclk: %u vddc: %u <6>[drm] Found smc ucode version: 0x%08x power level %d sclk: %u vddc: %u The htcTmpLmt should be larger than htcHystLmt. power level %d sclk: %u vddc: %u SMC failed to handle the message! power level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u power level %d sclk: %u mclk: %u vddc: %u vddci: %u power level %d sclk: %u mclk: %u vddc: %u vddci: %u cypress_construct_voltage_tables failed ni_process_firmware_header failed ni_initial_switch_from_arb_f0_to_f1 failed ni_init_smc_spll_table failed ni_init_arb_table_index failed ni_populate_mc_reg_table failed ni_initialize_smc_cac_tables failed ni_initialize_hardware_cac_manager failed ni_populate_smc_tdp_limits failed cypress_notify_smc_display_change failed ni_restrict_performance_levels_before_switch failed ni_enable_power_containment failed ni_upload_mc_reg_table failed ni_program_memory_timing_parameters failed ni_power_control_set_level failed unknown asic in smc ucode loader drivers/gpu/drm/radeon/si_smc.cpower level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u Unknown SI asic revision, failed to initialize PowerTune! Invalid PL2! DTE will not be updated. Could not enable thermal interrupts. Failed to load fan table to the SMC.si_construct_voltage_tables failed si_process_firmware_header failed si_initial_switch_from_arb_f0_to_f1 failed si_init_smc_spll_table failed si_init_arb_table_index failed si_populate_mc_reg_table failed si_initialize_smc_cac_tables failed si_initialize_smc_dte_tables failed si_populate_smc_tdp_limits failed si_populate_smc_tdp_limits_2 failed si_initialize_hardware_cac_manager failed si_notify_smc_display_change failed si_restrict_performance_levels_before_switch failed si_enable_power_containment failed si_upload_mc_reg_table failed si_program_memory_timing_parameters failed si_power_control_set_level failed si_set_power_state_conditionally_enable_ulv failed power level %d sclk: %u vddc: %u power level %d sclk: %u vddc: %u The htcTmpLmt should be larger than htcHystLmt. kv_calculate_ds_divider failed kv_process_firmware_header failed kv_upload_dpm_settings failed kv_populate_samu_table failed kv_enable_auto_thermal_throttling failed kv_enable_dpm_voltage_scaling failed kv_program_bootup_state failed unknown asic in smc ucode loader drivers/gpu/drm/radeon/ci_smc.c power level %d sclk: %u mclk: %u pcie gen: %u pcie lanes: %u Could not enable thermal interrupts. Could not disable thermal interrupts. power level avg sclk: %u mclk: %u ci_generate_dpm_level_enable_mask failed ci_update_and_upload_mc_reg_table failed ci_program_memory_timing_parameters failed ci_upload_dpm_level_enable_mask failed ci_freeze_sclk_mclk_dpm failed ci_populate_and_upload_sclk_mclk_dpm_levels failed ci_unfreeze_sclk_mclk_dpm failed ci_construct_voltage_tables failed ci_process_firmware_header failed ci_initial_switch_from_arb_f0_to_f1 failed ci_init_arb_table_index failed ci_populate_initial_mc_reg_table failed ci_enable_ds_master_switch failed ci_enable_power_containment failed ci_enable_thermal_based_sclk_dpm failed Failed to load fan table to the SMC.ci_notify_smc_display_change failed ci_power_control_set_level failed No connected audio pins found! drivers/gpu/drm/radeon/radeon.hdrivers/gpu/drm/radeon/radeon_vm.cbo %p don't has a mapping in vm %p include/drm/ttm/ttm_bo_driver.hCannot allocate memory for page table array va above limit (0x%08X > 0x%08X) bo %p va 0x%010Lx conflict with (bo %p 0x%010lx 0x%010lx) Unknown SDMA ucode version: %u.%u clear_state_descriptor_offset: %u avail_scratch_ram_locations: %u master_pkt_description_offset: %u Unknown RLC ucode version: %u.%u Unknown GFX ucode version: %u.%u Unknown SMC ucode version: %u.%u io_debug_array_offset_bytes: %u Unknown MC ucode version: %u.%u radeon: failed testing IB on GFX ring (%d). radeon: failed testing IB on ring %d (%d). failed to register debugfs file for SA failed to emit fence for new IB (%d) drivers/gpu/drm/radeon/radeon.hCouldn't read Speaker Allocation Data Block: %d drivers/gpu/drm/radeon/radeon_audio.cfailed to setup AVI infoframe: %d failed to pack AVI infoframe: %d <4>Calculated ACR N value is too small. You may experience audio problems. <4>Calculated ACR N value is too large. You may experience audio problems. Calculated ACR timing N=%d CTS=%d for frequency %d drivers/gpu/drm/radeon/radeon_dp_auxch.cauxch hw never signalled completion, error %08x dp_aux_ch flags not zero: %08x setting active device to %08x from %08x %08x for encoder %d failed to get ESI - device may have failed %d timed out waitin for SAT update %d timed out waiting for FE %d %d failed to get frontend for dig encoder timed out wait for rate cntl %d radeon: failed to get ib (%d). radeon: failed to schedule ib (%d). radeon: fence wait failed (%d). <6>[drm] ib test on ring %d succeeded in %u usecs radeon: ib test failed (0x%08X) radeon: writing more dwords to the ring than expected! radeon: dma failed to lock ring %d (%d). <6>[drm] ring test on %d succeeded in %d usecs radeon: ring %d test failed (0x%08X) radeon: writing more dwords to the ring than expected! radeon: writing more dwords to the ring than expected! radeon: writing more dwords to the ring than expected! radeon: writing more dwords to the ring than expected! radeon: failed to get ib (%d). radeon: failed to schedule ib (%d). radeon: fence wait failed (%d). <6>[drm] ib test on ring %d succeeded in %u usecs radeon: ib test failed (0x%08X) radeon: writing more dwords to the ring than expected! radeon: dma failed to lock ring %d (%d). <6>[drm] ring test on %d succeeded in %d usecs radeon: ring %d test failed (0x%08X) UVD IB length (%d) not 16 dwords aligned! Relocs at %d after relocations chunk end %d ! buffer (%d) to small (%d / %d)! reloc %LX-%LX crossing 256MB boundary! msg/fb buffer %LX-%LX out of 256MB segment! More than one message in a UVD-IB! UVD messages must be 64 byte aligned! Failed waiting for UVD message (%d)! Failed mapping the UVD message (%d)! UVD codec not supported by hardware %d! Invalid UVD decoding target pitch! Invalid dpb_size in UVD message (%d / %d)! UVD handle collision detected! Illegal UVD message type (%d)! Message needed before other commands are send! radeon_uvd: Can't load firmware "%s" (%d) failed to allocate UVD bo include/drm/ttm/ttm_bo_driver.h(%d) failed to reserve UVD bo radeon: writing more dwords to the ring than expected! radeon: failed to raise UVD clocks (%d). radeon: failed to get create msg (%d). radeon: failed to get destroy ib (%d). radeon: fence wait failed (%d). <6>[drm] ib test on ring %d succeeded radeon: cp failed to lock ring %d (%d). <6>[drm] ring test on %d succeeded in %d usecs radeon: ring %d test failed (0x%08X) UVD not responding, giving up!!! UVD not responding, trying to reset the VCPU!!! radeon: ring failed to lock UVD ring (%d). <6>[drm] UVD initialized successfully. radeon: writing more dwords to the ring than expected! radeon: writing more dwords to the ring than expected! Relocs at %d after relocations chunk end %d ! invalid VCE command length (%d)! No other command allowed after destroy! VCE handle collision detected! no session command at start of IB New session without create command! radeon: failed to get ib (%d). radeon: failed to schedule ib (%d). radeon: failed to get create msg (%d). radeon: failed to get destroy ib (%d). radeon: fence wait failed (%d). <6>[drm] ib test on ring %d succeeded Error destroying VCE handle (%d)! radeon_vce: Can't load firmware "%s" <6>[drm] Found VCE firmware/feedback version %hhd.%hhd.%hhd / %d! (%d) failed to allocate VCE bo include/drm/ttm/ttm_bo_driver.h(%d) failed to reserve VCE bo radeon: writing more dwords to the ring than expected! radeon: vce failed to lock ring %d (%d). <6>[drm] ring test on %d succeeded in %d usecs drivers/gpu/drm/radeon/vce_v1_0.cVCE not responding, giving up!!! VCE not responding, trying to reset the ECPU!!! <6>[drm] VCE initialized successfully. drivers/gpu/drm/radeon/vce_v2_0.cfailed to evaluate ATPX got %s <6>vga_switcheroo: detected switching method %s handle ATPX buffer is too small: %zu ATPX version %u, functions 0x%08x failed to evaluate ATCS got %s <6>[drm] ATCS buffer is too small: %zu failed to evaluate ATIF got %s event, device_class = %s, type = %#x ATIF: %d pending SBIOS requests Call to ATCS verify_interface failed: %d <6>[drm] ATIF buffer is too small: %zu Call to ATIF verify_interface failed: %d Cannot find a backlight controller SYSTEM_PARAMS: mask = %#x, flags = %#x Notification %s, command code = %#x Call to GET_SYSTEM_PARAMS failed: %d radeondrmfbradeonATI Radeon20080528 SAREA setup failed AGPPCIPCIE%s card detected done_age = %d <6>[drm] Num pipes: %d called before init done failed to cleanup PCI GART! radeon_do_cp_idle %d while CP running Forcing AGP card to PCI mode Restoring AGP flag TIMEOUT problem! BAD cp_mode (%x)! could not find sarea! dev_priv->cp_ring->handle %p dev_priv->gart_size %d dev_priv->gart_vm_start 0x%x failed to init PCI GART! radeon_cpradeon/R100_cp.binradeon/R200_cp.binradeon/R300_cp.binradeon/R420_cp.binradeon/RS690_cp.binradeon/RS600_cp.binradeon/R520_cp.binFailed to load firmware! offset fixed up to 0x%x color tiling disabled color tiling enabled Invalid parameter %d buf=%d s=0x%x e=0x%x bad prim %x count %d buffer prim %d bad prim %x numverts %d pid=%d copy_to_user idx=%d s=%d e=%d d=%d buffer index %d (of %d max) sending pending buffer %d flags = 0x%x %d,%d-%d,%d flags 0x%x %d,%d-%d,%d pfCurrentPage=%d null texture image! invalid texture format %d tex=%dx%d blit=%d EAGAIN EFAULT on pad, %d bytes Invalid destination offset dirty=0x%08x Invalid depth buffer offset pid=%d index=%d discard=%d radeon_emit_state2 failed misaligned buffer 0x%x no header 0x%x - 0x%x radeon_emit_state failed Not a type 3 packet Invalid first packet offset Invalid second packet offset Invalid packet type %x Invalid rndr_gen_indx offset RADEON_CMD_PACKET Invalid colour buffer offset Invalid R200 texture offset Invalid R100 texture offset Unknown state packet ID %d radeon_emit_packets failed RADEON_CMD_SCALARS RADEON_CMD_VECTORS RADEON_CMD_DMA_DISCARD bad buffer %p %p %d RADEON_CMD_PACKET3 Packet verification failed radeon_emit_packet3 failed RADEON_CMD_PACKET3_CLIP RADEON_CMD_SCALARS2 RADEON_CMD_WAIT %x radeon_emit_wait failed RADEON_CMD_VECLINEAR bad cmd_type %d at byte %d DONE radeon_emit_veclinear failed RADEON_CP_INITRADEON_CP_STARTRADEON_CP_STOPRADEON_CP_RESETRADEON_CP_IDLERADEON_RESETRADEON_FULLSCREENRADEON_SWAPRADEON_CLEARRADEON_VERTEXRADEON_INDICESRADEON_STIPPLERADEON_INDIRECTRADEON_TEXTURERADEON_VERTEX2RADEON_CMDBUFRADEON_GETPARAMRADEON_FLIPRADEON_ALLOCRADEON_FREERADEON_INIT_HEAPRADEON_IRQ_EMITRADEON_IRQ_WAITRADEON_CP_RESUMERADEON_SETPARAMRADEON_SURF_ALLOCRADEON_SURF_FREERADEON_CSRADEON_PP_MISCRADEON_PP_CNTLRADEON_RB3D_COLORPITCHRADEON_RE_LINE_PATTERNRADEON_SE_LINE_WIDTHRADEON_PP_LUM_MATRIXRADEON_PP_ROT_MATRIX_0RADEON_RB3D_STENCILREFMASKRADEON_SE_VPORT_XSCALERADEON_SE_CNTLRADEON_SE_CNTL_STATUSRADEON_RE_MISCRADEON_PP_TXFILTER_0RADEON_PP_BORDER_COLOR_0RADEON_PP_TXFILTER_1RADEON_PP_BORDER_COLOR_1RADEON_PP_TXFILTER_2RADEON_PP_BORDER_COLOR_2RADEON_SE_ZBIAS_FACTORRADEON_SE_TCL_OUTPUT_VTX_FMTR200_PP_TXCBLEND_0R200_PP_TXCBLEND_1R200_PP_TXCBLEND_2R200_PP_TXCBLEND_3R200_PP_TXCBLEND_4R200_PP_TXCBLEND_5R200_PP_TXCBLEND_6R200_PP_TXCBLEND_7R200_SE_TCL_LIGHT_MODEL_CTL_0R200_PP_TFACTOR_0R200_SE_VTX_FMT_0R200_SE_VAP_CNTLR200_SE_TCL_MATRIX_SEL_0R200_SE_TCL_TEX_PROC_CTL_2R200_PP_TXFILTER_0R200_PP_TXFILTER_1R200_PP_TXFILTER_2R200_PP_TXFILTER_3R200_PP_TXFILTER_4R200_PP_TXFILTER_5R200_PP_TXOFFSET_0R200_PP_TXOFFSET_1R200_PP_TXOFFSET_2R200_PP_TXOFFSET_3R200_PP_TXOFFSET_4R200_PP_TXOFFSET_5R200_SE_VTE_CNTLR200_PP_TAM_DEBUG3R200_PP_CNTL_XR200_RB3D_DEPTHXY_OFFSETR200_RE_AUX_SCISSOR_CNTLR200_RE_SCISSOR_TL_0R200_RE_SCISSOR_TL_1R200_RE_SCISSOR_TL_2R200_SE_VAP_CNTL_STATUSR200_SE_VTX_STATE_CNTLR200_RE_POINTSIZER200_PP_CUBIC_FACES_0R200_PP_CUBIC_OFFSET_F1_0R200_PP_CUBIC_FACES_1R200_PP_CUBIC_OFFSET_F1_1R200_PP_CUBIC_FACES_2R200_PP_CUBIC_OFFSET_F1_2R200_PP_CUBIC_FACES_3R200_PP_CUBIC_OFFSET_F1_3R200_PP_CUBIC_FACES_4R200_PP_CUBIC_OFFSET_F1_4R200_PP_CUBIC_FACES_5R200_PP_CUBIC_OFFSET_F1_5RADEON_PP_TEX_SIZE_0RADEON_PP_TEX_SIZE_1RADEON_PP_TEX_SIZE_2R200_RB3D_BLENDCOLORR200_SE_TCL_POINT_SPRITE_CNTLRADEON_PP_CUBIC_FACES_0RADEON_PP_CUBIC_OFFSET_T0_0RADEON_PP_CUBIC_FACES_1RADEON_PP_CUBIC_OFFSET_T1_0RADEON_PP_CUBIC_FACES_2RADEON_PP_CUBIC_OFFSET_T2_0R200_PP_TRI_PERFR200_PP_AFS_0R200_PP_AFS_1R200_ATF_TFACTORR200_PP_TXCTLALL_0R200_PP_TXCTLALL_1R200_PP_TXCTLALL_2R200_PP_TXCTLALL_3R200_PP_TXCTLALL_4R200_PP_TXCTLALL_5R200_VAP_PVS_CNTLheap already initialized?copy_to_user Invalid crtc %u copy_to_user %i cliprects copy cliprect faulted R300_CMD_PACKET0 R300_CMD_VPU R300_CMD_PACKET3 R300_CMD_PACKET3_CLEAR r300_emit_clear failed R300_CMD_PACKET3_RAW r300_emit_raw_packet3 failed r300_emit_packet3 failed R300_CMD_END3D R300_CMD_CP_DELAY RADEON_CMD_DMA_DISCARD buffer index %d (of %d max) bad buffer %p %p %d R300_CMD_WAIT R300_CMD_SCRATCH r300_scratch failed R300_CMD_R500FP r500fp %d %d type: %d bad cmd_type %i at byte %d END r300_emit_packet0 failed r300_emit_vpu failed r300_emit_r500fp failed dwords:%d offset 0x%lx ib_get failed EAGAIN EFAULT on pad, %d bytes Invalid destination offset %d,%d-%d,%d <6>[drm] Resetting GPU unable to map PCIGART pages! page entry %d: 0x%016llx &dev_priv->cs_mutexForcing AGP card to PCI mode Restoring AGP flag TIMEOUT problem! BAD cp_mode (%x)! could not find sarea! dev_priv->cp_ring->handle %p fb 0x%08x size %d dev_priv->gart_size %d Using gart offset 0x%08lx ioremap failed. Failed to init GART table r600_cpRV730RV630RV620RV635RV670RV710R600RS780radeon/%s_pfp.binradeon/%s_me.binFailed to load firmware! RV610RV770 GPU reset failed limiting GTT &rdev->ring_lock&rdev->dc_hw_i2c_mutex&rdev->gem.mutex&rdev->pm.mutex&rdev->gpu_clock_mutex&rdev->srbm_mutex&rdev->grbm_idx_mutex&rdev->pm.mclk_lock&rdev->exclusive_lock&rdev->mn_lockgart size (%d) too small Unable to find PCI I/O BAR ib ring test failed (%d). %p reserve failed Failed to pin cursor BO (%d) (%d) create WB bo failed (%d) pin WB bo failed (%d) map WB bo failed disenWB %sabled <6>radeon: switched on <6>radeon: switched off copy_from_user %s:%u unknown crtc id %d tiling config is r6xx+ only! WANT_CMASK: invalid value %d timestamp is r6xx+ only! tile mode array is si+ only! Invalid request %d copy_to_user %s:%u Invalid crtc %d Query failed! stat %d Fatal error during GPU init %p reserve failed RADEON_CP_INITRADEON_CP_STARTRADEON_CP_STOPRADEON_CP_RESETRADEON_CP_IDLERADEON_RESETRADEON_FULLSCREENRADEON_SWAPRADEON_CLEARRADEON_VERTEXRADEON_INDICESRADEON_STIPPLERADEON_INDIRECTRADEON_TEXTURERADEON_VERTEX2RADEON_CMDBUFRADEON_GETPARAMRADEON_FLIPRADEON_ALLOCRADEON_FREERADEON_INIT_HEAPRADEON_IRQ_EMITRADEON_IRQ_WAITRADEON_CP_RESUMERADEON_SETPARAMRADEON_SURF_ALLOCRADEON_SURF_FREERADEON_GEM_INFORADEON_GEM_CREATERADEON_GEM_MMAPRADEON_GEM_PREADRADEON_GEM_PWRITERADEON_GEM_SET_DOMAINRADEON_GEM_WAIT_IDLERADEON_CSRADEON_INFORADEON_GEM_SET_TILINGRADEON_GEM_GET_TILINGRADEON_GEM_BUSYRADEON_GEM_VARADEON_GEM_OPRADEON_GEM_USERPTRradeonDefault TV standard: NTSC Default TV standard: NTSC-J Default TV standard: PAL Default TV standard: PAL-M Default TV standard: PAL-N Default TV standard: PAL-CN Default TV standard: PAL-60 Default TV standard: SECAM TMDS PLL From ATOMBIOS %u %x old table version %d, %d Unknown table version %d, %d new table version %d, %d unknown voltage object table Unsupported IGP table: %d %d withwithoutBad LCD record %d Skipping Component Video 0x%xTV1 connected TV1 disconnected CV connected CV disconnected LCD1 connected LCD1 disconnected CRT1 connected CRT1 disconnected CRT2 connected CRT2 disconnected DFP1 connected DFP1 disconnected DFP2 connected DFP2 disconnected DFP3 connected DFP3 disconnected DFP4 connected DFP4 disconnected DFP5 connected DFP5 disconnected DFP6 connected DFP6 disconnected NONElm63adm1032adm1030max6649f75375asc7xxxRV6xxRV770adt7473External GPIOEvergreenemc2103SumoNorthern IslandsSouthern Islandslm96163Sea IslandsUnable to acquire AGP: %d Unable to get AGP info: %d 1, 2, 44, 8radeon AGP reinit failed Unknown table version %d %d unable to allocate a PPLL %p reserve failed No FB bound Unsupported screen format %s Default TV standard: NTSC Default TV standard: PAL Default TV standard: PAL-M Default TV standard: PAL-60 Default TV standard: NTSC-J 29.498928713 MHz TV ref clk 28.636360000 MHz TV ref clk 14.318180000 MHz TV ref clk 27.000000000 MHz TV ref clk DFP table revision: %d TMDS PLL From COMBIOS %u %x f75375Unknown connector type: %d No connector info found LCDLCD DDC Info Table found! DVI_DDCVGA_DDCMM_I2CMONIDGPIOPAD_MASKCRT2_DDC<6>[drm] Panel ID String: %s <6>[drm] Panel Size %dx%d TV1 connected TV1 disconnected LCD1 connected LCD1 disconnected CRT1 connected CRT1 disconnected CRT2 connected CRT2 disconnected DFP1 connected DFP1 disconnected DFP2 connected DFP2 disconnected Unknown id %d NONElm63adm1032<6>unimplemented! <6>Unknown IIO opcode. ATOM BIOS beeped! <7> block: %d base: 0x%04X POST card output: 0x%02X port: %d (%s) port: %d <6>Invalid BIOS magic. 761295520<6>Invalid ATI magic. ATOM<6>Invalid ATOM magic. <6>ATOM BIOS: %s %s @ 0x%04X [%d] @ 0x%04X << table: %d (%s) table: %d <7>REG[0x%04X]<6>Bad IO mode. <7>PS[0x%02X,0x%04X]<7>WS[0x%02X]<7>ID[0x%04X+%04X]<7>ID[0x%04X]<7>FB[0x%02X]<7>IMM 0x%08X <7>IMM 0x%04X <7>IMM 0x%02X <7>PLL[0x%02X]<7>MC[0x%02X]<7>.[31:0] -> 0x%08X <7>.[15:0] -> 0x%04X <7>.[23:8] -> 0x%04X <7>.[31:16] -> 0x%04X <7>.[7:0] -> 0x%02X <7>.[15:8] -> 0x%02X <7>.[23:16] -> 0x%02X <7>.[31:24] -> 0x%02X src1: src2: NEEQ result: %s switch: case: target: %04X <6>Bad case. LEGT result: %s %s fb_base: <7>PS[0x%02X]<7>.[31:0] <- 0x%08X <7>.[15:0] <- 0x%04X <7>.[23:8] <- 0x%04X <7>.[31:16] <- 0x%04X <7>.[7:0] <- 0x%02X <7>.[15:8] <- 0x%02X <7>.[23:16] <- 0x%02X <7>.[31:24] <- 0x%02X dst: shift: %d src: mask: 0x%08x count: %d noyes taken: %s target: 0x%04X RESERVEDMOVE_REGMOVE_PSMOVE_WSMOVE_FBMOVE_PLLMOVE_MCAND_REGAND_PSAND_WSAND_FBAND_PLLAND_MCOR_REGOR_PSOR_WSOR_FBOR_PLLOR_MCSHIFT_LEFT_REGSHIFT_LEFT_PSSHIFT_LEFT_WSSHIFT_LEFT_FBSHIFT_LEFT_PLLSHIFT_LEFT_MCSHIFT_RIGHT_REGSHIFT_RIGHT_PSSHIFT_RIGHT_WSSHIFT_RIGHT_FBSHIFT_RIGHT_PLLSHIFT_RIGHT_MCMUL_REGMUL_PSMUL_WSMUL_FBMUL_PLLMUL_MCDIV_REGDIV_PSDIV_WSDIV_FBDIV_PLLDIV_MCADD_REGADD_PSADD_WSADD_FBADD_PLLADD_MCSUB_REGSUB_PSSUB_WSSUB_FBSUB_PLLSUB_MCSET_ATI_PORTSET_PCI_PORTSET_SYS_IO_PORTSET_REG_BLOCKSET_FB_BASECOMPARE_REGCOMPARE_PSCOMPARE_WSCOMPARE_FBCOMPARE_PLLCOMPARE_MCSWITCHJUMPJUMP_EQUALJUMP_BELOWJUMP_ABOVEJUMP_BELOW_OR_EQUALJUMP_ABOVE_OR_EQUALJUMP_NOT_EQUALTEST_REGTEST_PSTEST_WSTEST_FBTEST_PLLTEST_MCDELAY_MILLISECDELAY_MICROSECCALL_TABLEREPEATCLEAR_REGCLEAR_PSCLEAR_WSCLEAR_FBCLEAR_PLLCLEAR_MCNOPEOTMASK_REGMASK_PSMASK_WSMASK_FBMASK_PLLMASK_MCPOST_CARDBEEPSAVE_REGRESTORE_REGSET_DATA_BLOCKXOR_REGXOR_PSXOR_WSXOR_FBXOR_PLLXOR_MCSHL_REGSHL_PSSHL_WSSHL_FBSHL_PLLSHL_MCSHR_REGSHR_PSSHR_WSSHR_FBSHR_PLLSHR_MCDEBUGCTB_DSASIC_InitGetDisplaySurfaceSizeASIC_RegistersInitVRAM_BlockVenderDetectionSetClocksRatioMemoryControllerInitGPIO_PinInitMemoryParamAdjustDVOEncoderControlGPIOPinControlSetEngineClockSetMemoryClockSetPixelClockDynamicClockGatingResetMemoryDLLResetMemoryDeviceMemoryPLLInitEnableMemorySelfRefreshAdjustMemoryControllerEnableASIC_StaticPwrMgtASIC_StaticPwrMgtStatusChangeDAC_LoadDetectionTMDS2EncoderControlLCD1OutputControlDAC1EncoderControlDAC2EncoderControlDVOOutputControlCV1OutputControlSetCRTC_DPM_StateTVEncoderControlTMDS1EncoderControlLVDSEncoderControlTV1OutputControlEnableScalerBlankCRTCEnableCRTCGetPixelClockEnableVGA_RenderEnableVGA_AccessSetCRTC_TimingSetCRTC_OverScanSetCRTC_ReplicationSelectCRTC_SourceEnableGraphSurfacesLUT_AutoFillEnableHW_IconCursorGetMemoryClockGetEngineClockSetCRTC_UsingDTDTimingTVBootUpStdPinDetectionDFP2OutputControlVRAM_BlockDetectionByStrapMemoryCleanUpReadEDIDFromHWAssistedI2CWriteOneByteToHWAssistedI2CReadHWAssistedI2CStatusSpeedFanControlPowerConnectorDetectionMC_SynchronizationComputeMemoryEnginePLLMemoryRefreshConversionVRAM_GetCurrentInfoBlockDynamicMemorySettingsMemoryTrainingEnableLVDS_SSDFP1OutputControlSetVoltageCRT1OutputControlCRT2OutputControlSetupHWAssistedI2CStatusClockSourceMemoryDeviceInitEnableYUVMMPLLMCPCIEPCIE PORTradeonradeon.cp1radeon.gfxradeon.cp2radeon.dmaradeon.dma1radeon.uvdradeon.vce1radeon.vce2radeon.unk%d --- ring %d --- radeon_fence_inforadeon_gpu_resetUnsupported memory type %u Unknown placement %d %p reserve failed radeon_vramradeon_gttFailed to init debugfs radeon_vram_mmradeon_gtt_mmttm_page_pool%p %p %lu %lu force free include/drm/drm_backport.h%p unpin not necessary %p validate failed for unpin %p pin failed %p reserve failed %p reserve failed dc=%u, fd=%d, rd=%d, pd=%d Wrote2: rd=%u, fd=%u, pd=%u Wrote: rd=%d, fd=%d, pd=%d %p reserve failed No FB bound Memory allocation failed radeon_bl%d bios LVDS_GEN_CNTL: 0x%x Adding native panel mode %s in favor of %s load_detect %x returned: %x coherenttmds_pllload detectiontv standardunderscanunderscan hborderunderscan vborderaudioditheroutput_cscradeon-crtc<6>[drm] Connector %d: <6>[drm] %s <6>[drm] Encoders: <6>[drm] CRT1: %s <6>[drm] CRT2: %s <6>[drm] LCD1: %s <6>[drm] DFP1: %s <6>[drm] DFP2: %s <6>[drm] DFP3: %s <6>[drm] DFP4: %s <6>[drm] DFP5: %s <6>[drm] DFP6: %s <6>[drm] TV1: %s <6>[drm] CV: %s PLL freq %llu %u %u %d %p reserve failed include/drm/drm_backport.hdriverbiosntscpalpal-mpal-60ntsc-jscart-palpal-cnsecamoffonautobypasstvrgbycbcr601ycbcr709HPD1HPD2HPD3HPD4HPD5HPD6NONEINTERNAL_LVDSINTERNAL_TMDS1INTERNAL_TMDS2INTERNAL_DAC1INTERNAL_DAC2INTERNAL_SDVOAINTERNAL_SDVOBSI170BCH7303CH7301INTERNAL_DVO1EXTERNAL_SDVOAEXTERNAL_SDVOBTITFP513INTERNAL_LVTM1VT1623HDMI_SI1930HDMI_INTERNALINTERNAL_KLDSCP_TMDS1INTERNAL_KLDSCP_DVO1INTERNAL_KLDSCP_DAC1INTERNAL_KLDSCP_DAC2SI178MVPU_FPGAINTERNAL_DDIVT1625HDMI_SI1932DP_AN9801DP_DP501INTERNAL_UNIPHYINTERNAL_KLDSCP_LVTMAINTERNAL_UNIPHY1INTERNAL_UNIPHY2NUTMEGTRAVISINTERNAL_VCEINTERNAL_UNIPHY3x %d y %d c->x %d c->y %d %p reserve failed include/drm/drm_backport.hval = 0x%02x i2c: unhandled radeon chip &i2c->mutexRadeon i2c hw bus %sFailed to register hw i2c %s Radeon i2c bit bus %sunsupported asic i2c write error 0x%08x i2c read error 0x%08x failed to get i2c bus failed to restore crtc mode %p reserve failed include/drm/drm_backport.hradeondrmfb<6>[drm] vram apper at 0x%lX <6>[drm] size %lu <6>[drm] fb depth is %d <6>[drm] pitch is %d include/drm/drm_gem.h CPUinclude/drm/drm_backport.hunimplemented %s %p reserve failed %d unsupported operation %d Couldn't update BO_VA (%d) radeon_gem_info GTTVRAMwptr: 0x%08x [%5d] rptr: 0x%08x [%5d] %u free dwords in ring %u dwords in ring r[%5d]=0x%08x * # (%d) ring create failed %p reserve failed (%d) ring pin failed (%d) ring map failed radeon_ring_gfxradeon_ring_cp1radeon_ring_cp2radeon_ring_dma1radeon_ring_dma2radeon_ring_uvdradeon_ring_vce1radeon_ring_vce2radeon: using MSI. <6>[drm] ib[%d]=0x%08X 0x%08x <--- 0x%08x No relocation chunk ! include/drm/drm_backport.hVM not active on asic! unknown ring id: %d Ring %d requires VM! VM not supported on ring %d! cs IB CONST too big: %d Failed to get const ib ! cs IB too big: %d Failed to get ib ! Invalid command stream ! Failed to sync rings: %i Failed to schedule IB ! Tmp BO not in VM! bo %p not in vm %p ATRMUnable to allocate bios VFCTACPI VFCT image truncated Unable to locate a BIOS ROM ATOMMOTACOM%sBIOS detected Unknown copy method %p reserve failed dmablitUnknown benchmark drivers/gpu/drm/radeon/r100.cRequested: e: %d m: %d p: %d [drm] zbuffer (%u %u %u %u) Max indices %u No texture bound to unit %u No reloc for packet3 %d Unknown packet type %d ! No reloc for ib[%d]=0x%04X cannot find crtc %d unknown crtc reloc Setting: p: %d CP_STAT 0x%08x CP_CSQ_MODE 0x%08x CP_CSQ_STAT 0x%08x CP_CSQ2_STAT 0x%08x Ring rptr %u Ring wptr %u Indirect1 rptr %u Indirect1 wptr %u Indirect2 rptr %u Indirect2 wptr %u Ring fifo: rfifo[%04d]=0x%08X Indirect1 fifo: ib1fifo[%04d]=0x%08X Indirect2 fifo: ib2fifo[%04d]=0x%08X RBBM_STATUS 0x%08x RBBM_CMDFIFO_STAT 0x%08x [0x%03X] 0x%04X=0x%08X CP_RB_WPTR 0x%08x CP_RB_RPTR 0x%08x %u free dwords in ring %u dwords in ring r[%04d]=0x%08x CONFIG_MEMSIZE 0x%08x MC_FB_LOCATION 0x%08x BUS_CNTL 0x%08x MC_AGP_LOCATION 0x%08x AGP_BASE 0x%08x HOST_PATH_CNTL 0x%08x AIC_CTRL 0x%08x AIC_LO_ADDR 0x%08x AIC_HI_ADDR 0x%08x AIC_TLB_ADDR 0x%08x writing surface %d %d %x %x radeon/R100_cp.binradeon/R200_cp.binradeon/R300_cp.binradeon/R420_cp.binradeon/RS690_cp.binradeon/RS600_cp.binradeon/R520_cp.binFailed to load firmware! (%s:%d) RBBM_STATUS=0x%08X failed to reset GPU GPU reset succeed Wait for MC idle timeout. failed initializing CP (%d). Disabling GPU acceleration HPD1 HPD2 GRPH_BUFFER_CNTL from to %x GRPH2_BUFFER_CNTL from to %x r100_mc_infor100_cp_ring_infor100_cp_csq_fifor100_rbbm_infoNo reloc for packet3 %d Unknown packet type %d ! No reloc for ib[%d]=0x%04X Invalid texture format %u Forbidden bit TXFORMAT_MSB drivers/gpu/drm/radeon/r300.cPCIE_TX_GART_CNTL 0x%08x PCIE_TX_GART_BASE 0x%08x PCIE_TX_GART_START_LO 0x%08x PCIE_TX_GART_START_HI 0x%08x PCIE_TX_GART_END_LO 0x%08x PCIE_TX_GART_END_HI 0x%08x PCIE_TX_GART_ERROR 0x%08x failed initializing CP (%d). Disabling GPU acceleration (%s:%d) RBBM_STATUS=0x%08X failed to reset GPU GPU reset succeed rv370_pcie_gart_infoGB_PIPE_SELECT 0x%08x GB_TILE_CONFIG 0x%08x DST_PIPE_CONFIG 0x%08x failed initializing CP (%d). Disabling GPU acceleration r420_pipes_infoForcing to 32M GART size failed initializing CP (%d). Disabling GPU acceleration HOST_PATH_CNTL 0x%08x BUS_CNTL 0x%08x AIC_CTRL_SCRATCH 0x%08x MCCFG_AGP_BASE 0x%08x MCCFG_AGP_BASE_2 0x%08x MCCFG_AGP_LOCATION 0x%08x MCCFG_FB_LOCATION 0x%08x HDP_FB_LOCATION 0x%08x AGP_BASE 0x%08x AGP_BASE_2 0x%08x MC_AGP_LOCATION 0x%08x GART_BASE 0x%08x GART_FEATURE_ID 0x%08x AGP_MODE_CONTROL 0x%08x MC_MISC_CNTL 0x%08x MC_MISC_UMA_CNTL 0x%08x GART_CACHE_CNTRL 0x%08x MC_GART_ERROR_ADDRESS 0x%08x GART_ERROR_0 0x%08x GART_ERROR_1 0x%08x GART_ERROR_2 0x%08x GART_ERROR_3 0x%08x GART_ERROR_4 0x%08x GART_ERROR_5 0x%08x GART_ERROR_6 0x%08x GART_ERROR_7 0x%08x rs400_gart_infoSetting: p: %d failed initializing CP (%d). failed initializing audio Disabling GPU acceleration (%s:%d) RBBM_STATUS=0x%08X failed to reset GPU GPU reset succeed HPD1 HPD2 HDMI0 failed initializing CP (%d). failed initializing audio Disabling GPU acceleration VAP_CNTL_STATUS 0x%08x GA_IDLE 0x%08x GB_PIPE_SELECT 0x%08x SU_REG_DEST 0x%08x GB_TILE_CONFIG 0x%08x DST_PIPE_CONFIG 0x%08x failed initializing CP (%d). Disabling GPU acceleration rv515_pipes_inforv515_ga_infofailed initializing CP (%d). Disabling GPU acceleration Requested: e: %d m: %d p: %d REDWOODRV770R600RV620RV630RV635RV670R700RV730RV710RV740JUNIPERCYPRESSSUMOPALMSUMO2drivers/gpu/drm/radeon/r600.cRS780radeon/%s_pfp.binradeon/%s_me.binradeon/%s_rlc.binradeon/%s_smc.binRV610CEDARSetting: v: %d %p reserve failed radeon: moving bo (%d). VM_L2_STATUS : 0x%08X MC busy: 0x%08X, clearing. Wait for MC idle timedout ! dpm thermal r600_irq_set: sw int r600_irq_set: sw int dma r600_irq_set: vblank 0 r600_irq_set: vblank 1 r600_irq_set: hpd 1 r600_irq_set: hpd 2 r600_irq_set: hpd 3 r600_irq_set: hpd 4 r600_irq_set: hpd 5 r600_irq_set: hpd 6 r600_irq_set: hdmi 0 radeon: IH init failed (%d). radeon: audio init failed IH: D1 vblank IH: D1 vline Unhandled interrupt: %d %d IH: D2 vblank IH: D2 vline IH: D1 flip IH: D2 flip IH: HPD1 IH: HPD2 IH: HPD3 IH: HPD4 IH: HPD5 IH: HPD6 IH: HDMI0 IH: HDMI1 IH: UVD int: 0x%08x IH: CP int: 0x%08x IH: CP EOP IH: DMA trap IH: thermal low to high IH: thermal high to low IH: GUI idle limiting VRAM Failed to load firmware! disabling GPU acceleration GPU softreset: 0x%08X SRBM_SOFT_RESET=0x%08X GPU pci config reset r600_mc_infolimiting VRAM Setting: v: %d Wait for MC idle timedout ! UVD fences init error (%d). radeon: IH init failed (%d). radeon: audio init failed Failed to load firmware! disabling GPU acceleration Failed to lock ring A %d Failed to create semaphore Failed to lock ring B %d Failed to lock ring B %p Unknown copy method Failed to create VRAM object %p reserve failed Failed to pin VRAM object Failed to pin GTT object %d Failed to map GTT object %d Failed GTT->VRAM copy %d Failed VRAM->GTT copy %d No reloc for ib[%d]=0x%04X radeon: moving bo (%d). No relocation chunk ! bad DMA_PACKET_WRITE bad DMA_PACKET_COPY Constant Fill is 7xx only ! No buffer for streamout %d %s invalid tile mode %s:%d invalid num pipes %d bad SET_CONTEXT_REG 0x%04X bad SET_CONFIG_REG 0x%04X vline WAIT_REG_MEM bad reg cannot find crtc %d unknown crtc reloc No reloc for ib[%d]=0x%04X bad SET PREDICATION bad START_3D bad CONTEXT_CONTROL bad INDEX_TYPE/NUM_INSTANCES bad DRAW_INDEX %s:%d invalid cmd stream bad DRAW_INDEX_AUTO %s:%d invalid cmd stream %d bad DRAW_INDEX_IMMD bad WAIT_REG_MEM cannot use PFP on REG wait bad CP DMA CP DMA SAS not supported bad CP DMA SRC CP DMA DAS not supported bad CP DMA DST bad SURFACE_SYNC bad EVENT_WRITE bad EVENT_WRITE_EOP bad PACKET3_SET_CONFIG_REG bad PACKET3_SET_CONTEXT_REG bad SET_RESOURCE alignments %d %d %d %lld bad SET_ALU_CONST bad SET_BOOL_CONST bad SET_LOOP_CONST bad SET_CTL_CONST bad SET_SAMPLER bad SURFACE_BASE_UPDATE bad COPY_DW (invalid count) Unknown packet type %d ! Invalid command stream ! Failed to parse relocation ! entryexitSetting: e: %d Setting: m: %d pm: GUI not idle!!! switching from power state: switching to power state: defaultautolowmidhighbatterybalancedperformancedynpmprofiledpm%s off %d %i radeon: dpm resume failed PX asic powered off voltage: %u mV PCIE lanes: %d == power state %d == %d Power State(s) State %d: %s Default %d PCIE Lanes Single display only %d Clock Mode(s) %d e: %d %d e: %d m: %d v: %d power_dpm_statepower_profilepower_methodtemp1_crittemp1_crit_hystpwm1pwm1_enablepwm1_minpwm1_maxradeon_pm_infoPowersaveBatteryBalancedPerformancetemp1_inputclock recovery tried 5 times clock recovery failed channel eq failed: 5 tries channel eq failed DPCD: %*ph Sink OUI: %02hx%02hx%02hx Branch OUI: %02hx%02hx%02hx dp_aux_ch timeout dp_aux_ch flags not zero dp_aux_ch error 0dB3.5dB6dB9.5dB0.4V0.6V0.8V1.2VDisEnstoppedplayingSetting: vddc: %d Setting: vddci: %d %p reserve failed (%d) reserve RLC c bo failed (%d) create RLC sr bo failed (%d) pin RLC sr bo failed (%d) map RLC sr bo failed (%d) create RLC c bo failed (%d) pin RLC c bo failed (%d) map RLC c bo failed MC busy: 0x%08X, clearing. force priority a to high force priority b to high GPU pci config reset Wait for MC idle timed out ! Wait for MC idle timedout ! r600_irq_set: sw int dma r600_irq_set: sw int dma1 dpm thermal evergreen_irq_set: vblank 0 evergreen_irq_set: vblank 1 evergreen_irq_set: vblank 2 evergreen_irq_set: vblank 3 evergreen_irq_set: vblank 4 evergreen_irq_set: vblank 5 evergreen_irq_set: hpd 1 evergreen_irq_set: hpd 2 evergreen_irq_set: hpd 3 evergreen_irq_set: hpd 4 evergreen_irq_set: hpd 5 evergreen_irq_set: hpd 6 evergreen_irq_set: hdmi 0 evergreen_irq_set: hdmi 1 evergreen_irq_set: hdmi 2 evergreen_irq_set: hdmi 3 evergreen_irq_set: hdmi 4 evergreen_irq_set: hdmi 5 IH: D1 vblank IH: D1 vline Unhandled interrupt: %d %d IH: D2 vblank IH: D2 vline IH: D3 vblank IH: D3 vline IH: D4 vblank IH: D4 vline IH: D5 vblank IH: D5 vline IH: D6 vblank IH: D6 vline IH: D%d flip IH: HPD1 IH: HPD2 IH: HPD3 IH: HPD4 IH: HPD5 IH: HPD6 IH: HPD_RX 1 IH: HPD_RX 2 IH: HPD_RX 3 IH: HPD_RX 4 IH: HPD_RX 5 IH: HPD_RX 6 IH: HDMI0 IH: HDMI1 IH: HDMI2 IH: HDMI3 IH: HDMI4 IH: HDMI5 SRBM_READ_ERROR: 0x%x IH: UVD int: 0x%08x IH: CP int: 0x%08x IH: CP EOP IH: DMA trap IH: thermal low to high IH: thermal high to low IH: GUI idle IH: DMA1 trap Failed to load MC firmware! Failed to init rlc BOs! UVD fences init error (%d). radeon: IH init failed (%d). radeon: audio init failed GPU reset failed ! Failed to load firmware! disabling GPU acceleration GPU softreset: 0x%08X GRBM_SOFT_RESET=0x%08X SRBM_SOFT_RESET=0x%08X Invalid register 0x%x in CS Packet0 not allowed! bad SET_BASEbad PACKET3_SET_CONFIG_REG CP DMA Bad SRC register CP DMA Bad DST register Unknown packet type %d ! bad DMA_PACKET_WRITE bad DMA_PACKET_COPY L2L Partial is cayman only ! bad DMA_PACKET_CONSTANT_FILL %s:%d %s invalid bankw %d %s:%d %s invalid bankh %d %s:%d invalid num pipes %d bad SET_CONTEXT_REG 0x%04X bad SET_CONFIG_REG 0x%04X No buffer for streamout %d cbstencildepthbad SET PREDICATION bad CONTEXT_CONTROL bad PACKET3_DEALLOC_STATE bad INDEX_BASE %s:%d invalid cmd stream bad INDEX_BUFFER_SIZE bad DRAW_INDEX bad DRAW_INDEX_2 bad DRAW_INDEX_AUTO %s:%d invalid cmd stream %d bad DRAW_INDEX_MULTI_AUTO bad DRAW_INDEX_IMMD bad DRAW_INDEX_OFFSET bad DRAW_INDEX_OFFSET_2 bad SET_BASE bad DRAW_INDIRECT bad DISPATCH_DIRECT bad DISPATCH_INDIRECT bad WAIT_REG_MEM cannot use PFP on REG wait bad CP DMA CP DMA SAS not supported bad CP DMA SRC bad CP DMA SRC_SEL CP DMA DAS not supported bad CP DMA DST bad CP DMA DST_SEL bad SURFACE_SYNC bad EVENT_WRITE bad EVENT_WRITE_EOP bad EVENT_WRITE_EOS bad PACKET3_SET_CONTEXT_REG bad SET_RESOURCE bad SET_RESOURCE (tex) texture%s:%d invalid array mode %d mipmapbad SET_RESOURCE (vtx) bad SET_BOOL_CONST bad SET_LOOP_CONST bad SET_CTL_CONST bad SET_SAMPLER bad COPY_DW (invalid count) No reloc for ib[%d]=0x%04X DisEnradeon_bo_create%s: bo=%p, pages=%u radeon_csring=%u, dw=%u, fences=%u radeon_vm_grab_idvmid=%u, ring=%u radeon_vm_bo_updateradeon_vm_set_pageradeon_vm_flushdev=%u, ring=%d, seqno=%u radeon_fence_emitradeon_fence_wait_beginradeon_fence_wait_endradeon_semaphore_signaleradeon_semaphore_waitbostruct radeon_bo *pagesu32ringdwfencesvmidsoffsetu64eoffsetflagspeaddrcountincrpd_addriddevintseqnowaiterssignedgpu_addruint64_tradeonunknownreadwrite BTCTURKSCAICOSCAYMANARUBAdrivers/gpu/drm/radeon/ni.cBARTSradeon/%s_pfp.binradeon/%s_me.binradeon/%s_rlc.binradeon/%s_mc.binradeon/%s_smc.binMC busy: 0x%08X, clearing. Failed to load MC firmware! Failed to init rlc BOs! UVD fences init error (%d). VCE init error (%d). radeon: IH init failed (%d). Failed to load firmware! disabling GPU acceleration GPU softreset: 0x%08X Wait for MC idle timedout ! GRBM_SOFT_RESET=0x%08X SRBM_SOFT_RESET=0x%08X CBCB_FMASKCB_CMASKCB_IMMEDDBDB_HTILESXDB_STENTC_TFETCHTC_VFETCHVCRLCDMAHDPCPSHVGTIHchosen encoder in use %d Unknown table for MST %d, %d Unknown table version %d, %d Memory allocation failed radeon_bl%dBios 0 scratch %x %08x detect returned false > no bo for sa manager %p reserve failed hw_i2c error Timeout setting UVD clocks! Invalid register 0x%x in CS CP DMA Bad SRC register CP DMA Bad DST register Packet0 not allowed! Invalid CE packet3: 0x%x bad PACKET3_SET_CONFIG_REG Invalid GFX packet3: 0x%x Non-PM4 ring %d ! Unknown packet type %d ! 0x%08x <--- 0x%08x limiting VRAM MC busy: 0x%08X, clearing. force priority to high unknown asic: 0x%x IH: D1 vblank IH: D1 vline Unhandled interrupt: %d %d IH: D2 vblank IH: D2 vline IH: D3 vblank IH: D3 vline IH: D4 vblank IH: D4 vline IH: D5 vblank IH: D5 vline IH: D6 vblank IH: D6 vline IH: D%d flip IH: HPD1 IH: HPD2 IH: HPD3 IH: HPD4 IH: HPD5 IH: HPD6 IH: HPD_RX 1 IH: HPD_RX 2 IH: HPD_RX 3 IH: HPD_RX 4 IH: HPD_RX 5 IH: HPD_RX 6 SRBM_READ_ERROR: 0x%x IH: UVD int: 0x%08x unknownreadwriteIH: CP EOP IH: DMA trap IH: thermal low to high IH: thermal high to low IH: GUI idle IH: DMA1 trap drivers/gpu/drm/radeon/si.csi_irq_set: sw int gfx si_irq_set: sw int cp1 si_irq_set: sw int cp2 si_irq_set: sw int dma si_irq_set: sw int dma1 si_irq_set: vblank 0 si_irq_set: vblank 1 si_irq_set: vblank 2 si_irq_set: vblank 3 si_irq_set: vblank 4 si_irq_set: vblank 5 si_irq_set: hpd 1 si_irq_set: hpd 2 si_irq_set: hpd 3 si_irq_set: hpd 4 si_irq_set: hpd 5 si_irq_set: hpd 6 dpm thermal GPU softreset: 0x%08X Wait for MC idle timedout ! GRBM_SOFT_RESET=0x%08X SRBM_SOFT_RESET=0x%08X GPU pci config reset Wait for MC idle timed out ! Failed to load MC firmware! Failed to init rlc BOs! UVD fences init error (%d). VCE init error (%d). radeon: IH init failed (%d). pitcairnPITCAIRNverdeVERDEolandOLANDhainanHAINANtahitiTAHITIradeon/%s_pfp.binradeon/%s_me.binradeon/%s_ce.binradeon/%s_rlc.binradeon/%s_mc.binradeon/%s_mc2.bin<6>[drm] %s: %zu bytes radeon/%s_smc.binFailed to load firmware! disabling GPU acceleration si startup failed on resume TCCBCB_FMASKCB_CMASKCB_IMMEDDBDB_HTILEDB_STENCPSHRLCVGTDMA1IHDMA0HDP%p reserve failed hawaiiHAWAIIkaveriKAVERIkabiniKABINImullinsMULLINSdrivers/gpu/drm/radeon/cik.cbonaireBONAIREradeon/%s_pfp.binradeon/%s_me.binradeon/%s_ce.binradeon/%s_mec.binradeon/%s_mec2.binradeon/%s_rlc.binradeon/%s_sdma.binradeon/%s_mc.binradeon/%s_mc2.bin<6>[drm] %s: %zu bytes radeon/%s_smc.bin%p reserve failed radeon: moving bo (%d). GRBM_STATUS=0x%08X GRBM_STATUS2=0x%08X GRBM_STATUS_SE0=0x%08X GRBM_STATUS_SE1=0x%08X GRBM_STATUS_SE2=0x%08X GRBM_STATUS_SE3=0x%08X SRBM_STATUS=0x%08X SRBM_STATUS2=0x%08X CP_STAT = 0x%08x CP_STALLED_STAT1 = 0x%08x CP_STALLED_STAT2 = 0x%08x CP_STALLED_STAT3 = 0x%08x CP_CPF_BUSY_STAT = 0x%08x CP_CPF_STATUS = 0x%08x CP_CPC_BUSY_STAT = 0x%08x CP_CPC_STATUS = 0x%08x MC busy: 0x%08X, clearing. Wait for MC idle timedout ! force priority to high Mode too big for LB! (%d) reserve MQD bo failed (%d) create MQD bo failed (%d) pin MQD bo failed (%d) map MQD bo failed cik_irq_set: sw int gfx si_irq_set: sw int cp1 si_irq_set: sw int cp2 cik_irq_set: sw int dma cik_irq_set: sw int dma1 cik_irq_set: vblank 0 cik_irq_set: vblank 1 cik_irq_set: vblank 2 cik_irq_set: vblank 3 cik_irq_set: vblank 4 cik_irq_set: vblank 5 cik_irq_set: hpd 1 cik_irq_set: hpd 2 cik_irq_set: hpd 3 cik_irq_set: hpd 4 cik_irq_set: hpd 5 cik_irq_set: hpd 6 IH: D1 vblank IH: D1 vline Unhandled interrupt: %d %d IH: D2 vblank IH: D2 vline IH: D3 vblank IH: D3 vline IH: D4 vblank IH: D4 vline IH: D5 vblank IH: D5 vline IH: D6 vblank IH: D6 vline IH: D%d flip IH: HPD1 IH: HPD2 IH: HPD3 IH: HPD4 IH: HPD5 IH: HPD6 IH: HPD_RX 1 IH: HPD_RX 2 IH: HPD_RX 3 IH: HPD_RX 4 IH: HPD_RX 5 IH: HPD_RX 6 SRBM_READ_ERROR: 0x%x IH: UVD int: 0x%08x readwriteIH: VCE int: 0x%08x IH: CP EOP IH: SDMA trap IH: thermal low to high IH: thermal high to low IH: GUI idle GPU softreset: 0x%08X GRBM_SOFT_RESET=0x%08X SRBM_SOFT_RESET=0x%08X GPU pci config reset Wait for MC idle timed out ! Failed to load MC firmware! Failed to init rlc BOs! (%d) pin HDP EOP bo failed (%d) map HDP EOP bo failed Failed to init MEC BOs! UVD fences init error (%d). VCE init error (%d). radeon: IH init failed (%d). Failed to load firmware! disabling GPU acceleration cik startup failed on resume status: c r b caps: single_disp video no_dc ui class: none battery balanced performance internal class: noneboot thermal limited_pwr rest forced 3d_perf ovrdrv uvd 3d_low acpi uvd_hd2 uvd_hd uvd_sd limited_pwr2 ulv uvd_mvc uvd vclk: %d dclk: %d uvd vclk: %d dclk: %d uvd vclk: %d dclk: %d invalid dpm profile %d uvd vclk: %d dclk: %d uvd vclk: %d dclk: %d rv770_set_sw_state failed Could not force DPM to low. rv770_halt_smc failed rv770_upload_sw_state failed rv770_resume_smc failed invalid dpm profile %d uvd vclk: %d dclk: %d rv770_upload_firmware failed rv770_init_smc_table failed Could not force DPM to low rv770_halt_smc failed rv770_resume_smc failed rv770_set_sw_state failed rv770_upload_firmware failed invalid dpm profile %d uvd vclk: %d dclk: %d Failed to load MC firmware! rv770_halt_smc failed rv770_resume_smc failed rv770_set_sw_state failed rv770_upload_firmware failed uvd vclk: %d dclk: %d Unsupported IGP table: %d %d uvd vclk: %d dclk: %d invalid dpm profile %d uvd vclk: %d dclk: %d Unsupported IGP table: %d %d engine clock out of range!UVD clock index not found! invalid dpm profile %d uvd vclk: %d dclk: %d Unknown SMC message! uvd vclk: %d dclk: %d invalid dpm profile %d uvd vclk: %d dclk: %d Failed to load MC firmware! rv770_upload_firmware failed ni_init_smc_table failed ni_enable_smc_cac failed rv770_halt_smc failed ni_upload_sw_state failed rv770_resume_smc failed rv770_set_sw_state failed invalid dpm profile %d uvd vclk: %d dclk: %d DTE is not enabled! Failed to load MC firmware! si_upload_firmware failed si_init_smc_table failed si_enable_smc_cac failed si_halt_smc failed si_upload_sw_state failed si_upload_ulv_state failed si_resume_smc failed si_disable_ulv failed si_set_sw_state failed uvd vclk: %d dclk: %d invalid dpm profile %d endisuvd %sabled vce %sabled Unsupported IGP table: %d %d kv_smc_bapm_enable failed kv_update_vce_dpm failed kv_populate_uvd_table failed kv_populate_vce_table failed kv_populate_acp_table failed kv_set_dpm_interval failed kv_set_dpm_boot_state failed kv_enable_ulv failed kv_enable_didt failed kv_enable_smc_cac failed uvd vclk: %d dclk: %d Invalid PCC GPIO: %u! Failed to load MC firmware! disenuvd %sabled vce %sabled ci_update_vce_dpm failed ci_update_sclk_t failed ci_upload_firmware failed ci_init_smc_table failed ci_enable_ulv failed ci_start_dpm failed ci_enable_didt failed ci_enable_smc_cac failed ci_populate_pm_base failed %p reserve failed &vm->mutexstill active bo inside vm size_bytes: %u header_size_bytes: %u header_version_major: %u header_version_minor: %u ip_version_major: %u ip_version_minor: %u ucode_version: 0x%08x ucode_size_bytes: %u ucode_array_offset_bytes: %u crc32: 0x%08x SDMA ucode_feature_version: %u ucode_change_version: %u jt_offset: %u jt_size: %u RLC save_and_restore_offset: %u GFX SMC ucode_start_addr: %u MC io_debug_size_bytes: %u couldn't schedule ib scheduling IB failed (%d). failed to sync rings (%d) failed to get a new IB (%d) radeon_sa_infoSyncing to a disabled ring!Couldn't read SADs: %d dp_aux_ch timed out checking %p vs %p edid retrieved %p enc master is %p dig clock %p %d %d attrib %d: %d %d got esi %02x %02x %02x got esi2 %02x %02x %02x Sink is MST capable Sink is not MST capable dp_clock %p %d writing 0x%08x 0x%08x got mst dpms on non-DCE5 got connector %d dig encoder is %d %d %d DPMS OFF %d failed to find connector %p %d %d radeon_mst_inforadeon: moving bo (%d). radeon: moving bo (%d). radeon: moving bo (%d). radeon: moving bo (%d). radeon: moving bo (%d). No relocation chunk ! invalid reloc offset %X! invalid UVD command %X! Invalid UVD handle! Handle 0x%x already in use! No more free UVD handles! UVD codec not handled %d! Invalid UVD handle 0x%x! Invalid reg 0x%X! Unknown packet type %d ! UVD-IBs need a msg command! radeon/RS780_uvd.binradeon/R600_uvd.binradeon/RV770_uvd.binradeon/RV710_uvd.binradeon/CYPRESS_uvd.binradeon/SUMO_uvd.binradeon/TAHITI_uvd.binradeon/BONAIRE_uvd.bin%p reserve failed (%d) UVD bo pin failed (%d) UVD map failed Timeout setting UVD clocks! Error destroying UVD (%d)! invalid reloc offset %llX! buffer to small (%d / %d)! No more free VCE handles! Handle already in use! invalid VCE command (0x%x)! radeon/BONAIRE_vce.binradeon/TAHITI_vce.bin%2hhd.%2hhd.%2hhd]%2u]%p reserve failed (%d) VCE bo pin failed radeon: ring %d test failed (%d) VCE map failed [ATI LIB=VCEFWSTATS,[ATI LIB=VCEFW,ATPXATCSATIFvideoSBIOS pending requests: %#x Changing brightness to %d ac_adapterpm: AC pm: DC ATCS version %u ATIF version %u disabledenabledlicense=GPL and additional rightsdescription=ATI Radeonauthor=Gareth Hughes, Keith Whitwell, others.parmtype=mst:intparm=mst:DisplayPort MST experimental support (1 = enable, 0 = disable)parmtype=auxch:intparm=auxch:Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)parmtype=backlight:intparm=backlight:backlight support (1 = enable, 0 = disable, -1 = auto)parmtype=bapm:intparm=bapm:BAPM support (1 = enable, 0 = disable, -1 = auto)parmtype=use_pflipirq:intparm=use_pflipirq:Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))parmtype=deep_color:intparm=deep_color:Deep Color support (1 = enable, 0 = disable (default))parmtype=vm_block_size:intparm=vm_block_size:VM page table size in bits (default depending on vm_size)parmtype=vm_size:intparm=vm_size:VM address space size in gigabytes (default 4GB)parmtype=hard_reset:intparm=hard_reset:PCI config reset (1 = force enable, 0 = disable (default))parmtype=runpm:intparm=runpm:PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)parmtype=aspm:intparm=aspm:ASPM support (1 = enable, 0 = disable, -1 = auto)parmtype=dpm:intparm=dpm:DPM support (1 = enable, 0 = disable, -1 = auto)parmtype=fastfb:intparm=fastfb:Direct FB access for IGP chips (0 = disable, 1 = enable)parmtype=lockup_timeout:intparm=lockup_timeout:GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)parmtype=msi:intparm=msi:MSI support (1 = enable, 0 = disable, -1 = auto)parmtype=pcie_gen2:intparm=pcie_gen2:PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)parmtype=hw_i2c:intparm=hw_i2c:hw i2c engine enable (0 = disable)parmtype=disp_priority:intparm=disp_priority:Display Priority (0 = auto, 1 = normal, 2 = high)parmtype=audio:intparm=audio:Audio enable (-1 = auto, 0 = disable, 1 = enable)parmtype=tv:intparm=tv:TV enable (0 = disable)parmtype=connector_table:intparm=connector_table:Force connector tableparmtype=test:intparm=test:Run testsparmtype=benchmark:intparm=benchmark:Run benchmarkparmtype=gartsize:intparm=gartsize:Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)parmtype=agpmode:intparm=agpmode:AGP Mode (-1 == PCI)parmtype=vramlimit:intparm=vramlimit:Restrict VRAM for testing, in megabytesparmtype=r4xx_atom:intparm=r4xx_atom:Enable ATOMBIOS modesetting for R4xxparmtype=dynclks:intparm=dynclks:Disable/Enable dynamic clocksparmtype=modeset:intparm=modeset:Disable/Enable modesettingparmtype=no_wb:intparm=no_wb:Disable AGP writeback for scratch registersfirmware=radeon/R520_cp.binfirmware=radeon/RS600_cp.binfirmware=radeon/RS690_cp.binfirmware=radeon/R420_cp.binfirmware=radeon/R300_cp.binfirmware=radeon/R200_cp.binfirmware=radeon/R100_cp.binfirmware=radeon/RV710_me.binfirmware=radeon/RV710_pfp.binfirmware=radeon/RV730_me.binfirmware=radeon/RV730_pfp.binfirmware=radeon/RV770_me.binfirmware=radeon/RV770_pfp.binfirmware=radeon/RS780_me.binfirmware=radeon/RS780_pfp.binfirmware=radeon/RV670_me.binfirmware=radeon/RV670_pfp.binfirmware=radeon/RV635_me.binfirmware=radeon/RV635_pfp.binfirmware=radeon/RV620_me.binfirmware=radeon/RV620_pfp.binfirmware=radeon/RV630_me.binfirmware=radeon/RV630_pfp.binfirmware=radeon/RV610_me.binfirmware=radeon/RV610_pfp.binfirmware=radeon/R600_me.binfirmware=radeon/R600_pfp.binfirmware=radeon/R520_cp.binfirmware=radeon/RS600_cp.binfirmware=radeon/RS690_cp.binfirmware=radeon/R420_cp.binfirmware=radeon/R300_cp.binfirmware=radeon/R200_cp.binfirmware=radeon/R100_cp.binfirmware=radeon/SUMO2_me.binfirmware=radeon/SUMO2_pfp.binfirmware=radeon/SUMO_me.binfirmware=radeon/SUMO_pfp.binfirmware=radeon/SUMO_rlc.binfirmware=radeon/PALM_me.binfirmware=radeon/PALM_pfp.binfirmware=radeon/CYPRESS_smc.binfirmware=radeon/CYPRESS_rlc.binfirmware=radeon/CYPRESS_me.binfirmware=radeon/CYPRESS_pfp.binfirmware=radeon/JUNIPER_smc.binfirmware=radeon/JUNIPER_rlc.binfirmware=radeon/JUNIPER_me.binfirmware=radeon/JUNIPER_pfp.binfirmware=radeon/REDWOOD_smc.binfirmware=radeon/REDWOOD_rlc.binfirmware=radeon/REDWOOD_me.binfirmware=radeon/REDWOOD_pfp.binfirmware=radeon/CEDAR_smc.binfirmware=radeon/CEDAR_rlc.binfirmware=radeon/CEDAR_me.binfirmware=radeon/CEDAR_pfp.binfirmware=radeon/R700_rlc.binfirmware=radeon/R600_rlc.binfirmware=radeon/RV710_smc.binfirmware=radeon/RV710_me.binfirmware=radeon/RV710_pfp.binfirmware=radeon/RV740_smc.binfirmware=radeon/RV730_smc.binfirmware=radeon/RV730_me.binfirmware=radeon/RV730_pfp.binfirmware=radeon/RV770_smc.binfirmware=radeon/RV770_me.binfirmware=radeon/RV770_pfp.binfirmware=radeon/RS780_me.binfirmware=radeon/RS780_pfp.binfirmware=radeon/RV670_me.binfirmware=radeon/RV670_pfp.binfirmware=radeon/RV635_me.binfirmware=radeon/RV635_pfp.binfirmware=radeon/RV620_me.binfirmware=radeon/RV620_pfp.binfirmware=radeon/RV630_me.binfirmware=radeon/RV630_pfp.binfirmware=radeon/RV610_me.binfirmware=radeon/RV610_pfp.binfirmware=radeon/R600_me.binfirmware=radeon/R600_pfp.binfirmware=radeon/ARUBA_rlc.binfirmware=radeon/ARUBA_me.binfirmware=radeon/ARUBA_pfp.binfirmware=radeon/CAYMAN_smc.binfirmware=radeon/CAYMAN_rlc.binfirmware=radeon/CAYMAN_mc.binfirmware=radeon/CAYMAN_me.binfirmware=radeon/CAYMAN_pfp.binfirmware=radeon/CAICOS_smc.binfirmware=radeon/CAICOS_mc.binfirmware=radeon/CAICOS_me.binfirmware=radeon/CAICOS_pfp.binfirmware=radeon/TURKS_smc.binfirmware=radeon/TURKS_mc.binfirmware=radeon/TURKS_me.binfirmware=radeon/TURKS_pfp.binfirmware=radeon/BTC_rlc.binfirmware=radeon/BARTS_smc.binfirmware=radeon/BARTS_mc.binfirmware=radeon/BARTS_me.binfirmware=radeon/BARTS_pfp.binfirmware=radeon/hainan_smc.binfirmware=radeon/hainan_rlc.binfirmware=radeon/hainan_mc.binfirmware=radeon/hainan_ce.binfirmware=radeon/hainan_me.binfirmware=radeon/hainan_pfp.binfirmware=radeon/HAINAN_smc.binfirmware=radeon/HAINAN_rlc.binfirmware=radeon/HAINAN_mc2.binfirmware=radeon/HAINAN_mc.binfirmware=radeon/HAINAN_ce.binfirmware=radeon/HAINAN_me.binfirmware=radeon/HAINAN_pfp.binfirmware=radeon/oland_smc.binfirmware=radeon/oland_rlc.binfirmware=radeon/oland_mc.binfirmware=radeon/oland_ce.binfirmware=radeon/oland_me.binfirmware=radeon/oland_pfp.binfirmware=radeon/OLAND_smc.binfirmware=radeon/OLAND_rlc.binfirmware=radeon/OLAND_mc2.binfirmware=radeon/OLAND_mc.binfirmware=radeon/OLAND_ce.binfirmware=radeon/OLAND_me.binfirmware=radeon/OLAND_pfp.binfirmware=radeon/verde_smc.binfirmware=radeon/verde_rlc.binfirmware=radeon/verde_mc.binfirmware=radeon/verde_ce.binfirmware=radeon/verde_me.binfirmware=radeon/verde_pfp.binfirmware=radeon/VERDE_smc.binfirmware=radeon/VERDE_rlc.binfirmware=radeon/VERDE_mc2.binfirmware=radeon/VERDE_mc.binfirmware=radeon/VERDE_ce.binfirmware=radeon/VERDE_me.binfirmware=radeon/VERDE_pfp.binfirmware=radeon/pitcairn_smc.binfirmware=radeon/pitcairn_rlc.binfirmware=radeon/pitcairn_mc.binfirmware=radeon/pitcairn_ce.binfirmware=radeon/pitcairn_me.binfirmware=radeon/pitcairn_pfp.binfirmware=radeon/PITCAIRN_smc.binfirmware=radeon/PITCAIRN_rlc.binfirmware=radeon/PITCAIRN_mc2.binfirmware=radeon/PITCAIRN_mc.binfirmware=radeon/PITCAIRN_ce.binfirmware=radeon/PITCAIRN_me.binfirmware=radeon/PITCAIRN_pfp.binfirmware=radeon/tahiti_smc.binfirmware=radeon/tahiti_rlc.binfirmware=radeon/tahiti_mc.binfirmware=radeon/tahiti_ce.binfirmware=radeon/tahiti_me.binfirmware=radeon/tahiti_pfp.binfirmware=radeon/TAHITI_smc.binfirmware=radeon/TAHITI_rlc.binfirmware=radeon/TAHITI_mc2.binfirmware=radeon/TAHITI_mc.binfirmware=radeon/TAHITI_ce.binfirmware=radeon/TAHITI_me.binfirmware=radeon/TAHITI_pfp.binfirmware=radeon/mullins_sdma.binfirmware=radeon/mullins_rlc.binfirmware=radeon/mullins_mec.binf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